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Contents

README

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24LC256-E

Microchip Tech · EEPROM · SOIC-8

24LC256-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input User-configurable chip address input that must be connected to either VCC or VSS, used to select among up to eight devices on the same bus.
2 A1 input User-configurable chip address input that must be connected to either VCC or VSS, used to select among up to eight devices on the same bus.
3 A2 input User-configurable chip address input that must be connected to either VCC or VSS, used to select among up to eight devices on the same bus.
4 VSS power_in Ground.
5 SDA bidirectional Open-drain bidirectional serial data pin for addresses and data, requiring a pull-up resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz and 1 MHz).
6 SCL input Serial clock input used to synchronize data transfer to and from the device.
7 WP input Write-protect input that must be tied to VSS (writes enabled) or VCC (writes inhibited, reads unaffected).
8 VCC power_in Power supply, 2.5V to 5.5V for 24LC256 devices.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package SOIC-8
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage on all inputs and outputs w.r.t. VSS (minimum) -0.6 V -0.6V to VCC +1.0V 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
ESD protection on all pins 4 kV 3
Supply voltage range 24LC256 VCC 2.5 5.5 V Device Selection Table 1
Operating temperature, Extended (E) TA -40 125 °C Extended (E) 3
High-level input voltage VIH 0.7 xVCC 3
Low-level input voltage VIL 0.3 xVCC VCC ≥ 2.5V 3
Hysteresis of Schmitt trigger inputs (SDA, SCL) VHYS 0.05 xVCC VCC ≥ 2.5V (Note 1) 3
Low-level output voltage VOL 0.4 V IOL = 3.0 mA @ VCC = 4.5V; IOL = 2.1 mA @ VCC = 2.5V 3
Input leakage current ILI -1 1 µA VIN = VSS or VCC, WP = VSS; VIN = VSS or VCC, WP = VCC 3
Output leakage current ILO -1 1 µA VOUT = VSS or VCC 3
Pin capacitance (all inputs/outputs) CIN, COUT 10 pF VCC = 5.0V, TA = +25°C, FCLK = 1 MHz (Note 1) 3
Read operating current ICC Read 400 µA VCC = 5.5V, SCL = 400 kHz 3
Write operating current ICC Write 3 mA VCC = 5.5V 3
Standby current, E-temp ICCS 5 µA SDA = SCL = VCC = 5.5V, A0, A1, A2, WP = VSS, E-Temp. 3
Clock frequency FCLK 400 kHz 2.5V ≤ VCC ≤ 5.5V 4
Clock high time THIGH 600 ns 2.5V ≤ VCC ≤ 5.5V 4
Clock low time TLOW 1300 ns 2.5V ≤ VCC ≤ 5.5V 4
SDA and SCL rise time TR 300 ns 2.5V ≤ VCC ≤ 5.5V (Note 1) 4
SDA and SCL fall time TF 300 ns All except 24FC256 (Note 1) 4
Start condition hold time THD:STA 600 ns 2.5V ≤ VCC ≤ 5.5V 4
Start condition setup time TSU:STA 600 ns 2.5V ≤ VCC ≤ 5.5V 4
Data input hold time THD:DAT 0 ns Note 2 4
Data input setup time TSU:DAT 100 ns 2.5V ≤ VCC ≤ 5.5V 4
Stop condition setup time TSU:STO 600 ns 2.5V ≤ VCC ≤ 5.5V 4
WP setup time TSU:WP 600 ns 2.5V ≤ VCC ≤ 5.5V 5
WP hold time THD:WP 1300 ns 2.5V ≤ VCC ≤ 5.5V 5
Output valid from clock TAA 900 ns 2.5V ≤ VCC ≤ 5.5V (Note 2) 5
Bus free time TBUF 1300 ns 2.5V ≤ VCC ≤ 5.5V 5
Output fall time from VIH min to VIL max TOF 250 ns CB ≤ 100 pF, All except 24FC256 (Note 1) 5
Input filter spike suppression (SDA and SCL) TSP 50 ns All except 24FC256 (Notes 1 and 3) 5
Write cycle time (byte or page) TWC 5 ms 5
Endurance 1e+06 cycles +25°C, 5.5V, Page mode (Note 4) 5

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC] A A2 25

CAD (KiCad official)

  • Symbol: 24LC256-E
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 24lc256-e-etched.step / 24lc256-e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 24lc256-e.step / 24lc256-e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (45 pp, sha256 362d63fbe6daedc7, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF