MAX49925ATB from ANALOG DEVICES, in a TDFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RS+	input	External resistor power-side connection input; common-mode range -40V to +76V, protected from -42V to +80V.
2	RS-	input	External resistor load-side connection input; common-mode range -40V to +76V, protected from -42V to +80V.
3	N.C.	unconnected	Not connected.
4	OUT	output	Current-sense output with its common-mode point at VREF; rail-to-rail, continuous current limited to 10mA.
5	GND	power_in	Ground; signal and power return.
6	VDD	power_in	Supply voltage input of 2.7V to 5.5V; bypass to ground with a 10nF C0G/NP0 and 1µF X5R.
7	REF2	input	Reference input 2; VREF = (VREF1 + VREF2)/2 sets the output common-mode point.
8	REF1	input	Reference input 1; VREF = (VREF1 + VREF2)/2 sets the output common-mode point.
9	GAIN2	input	Gain selection input 2; with GAIN1 selects gain of 10, 20, 50 or 100V/V (logic low to GND, high to VDD).
10	GAIN1	input	Gain selection input 1; with GAIN2 selects gain of 10, 20, 50 or 100V/V (logic low to GND, high to VDD).
11	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	ANALOG DEVICES
Package	TDFN-10-EP(3x3)
Category	Global Sourcing Parts
Pins	11

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Voltage	VDD	2.7		5.5	V	Guaranteed by PSRR	4
Supply Current	IDD		5	7	mA		4
Input-Protected Common-Mode Range	VCM_P	-42		80	V		4
Input Common-Mode Range	VCM	-40		76	V	-40°C ≤ TA ≤ +125°C	4
Input Bias Current	IRS+, IRS-		3	300	nA	VSENSE = 0V (Note 1)	4
Input Bias Current	IRS+, IRS-		3.5	6	µA	VSENSE = 20mV	4
Input Leakage Current	ILKG		3	400	nA	VDD = 0V, 0V ≤ VRS± ≤ 65V (Note 1)	4
Input Offset Voltage	VOS		5	20	μV	TA = +25°C	4
Input Offset Voltage	VOS			200	μV	-40°C ≤ TA ≤ +125°C	4
Power Supply Rejection Ratio	PSRR	90	110		dB	2.7V ≤ VDD ≤ 5.5V	4
Common-Mode Rejection Ratio	CMRR	120	140		dB	-40V ≤ VCM ≤ +76V; -40°C ≤ TA ≤ +125°C	4
Gain Error	GE		0.05	0.3	%	-40°C ≤ TA ≤ +125°C, -800mV/gain ≤ VSENSE ≤ 800mV/gain	4
Output Voltage Swing High	VOH		45	100	mV	Sourcing 5mA; VOH = VDD - VOUT	4
Output Voltage Swing Low	VOL		35	70	mV	Sinking 5mA; VOL = VOUT - GND	4
Input Low Level	VIL			0.55	V		5
Input High Level	VIH	1.3			V		5
Logic Input Leakage Current	IL		3	30	nA		5
Power-Up Time	tPWR_UP		200		µs	Out settle within 1%	4
Input Offset Drift	TCVOS		0.05		µV/°C		4
Input Capacitance	CIN		3		pF	RS+ and RS- input	4
Output Short-Circuit Current	ISC		20		mA	Shorted to either VDD or GND	4
Reference Voltage Rejection Ratio	RRRR		2		µV/V		4
Signal Bandwidth	BW-3dB		300		kHz		4
Output Slew Rate	SR		1.5		V/µs	2VP-P output square wave, centered at 1.65V	4
Amplifier Small-Signal Settling Time (1%)	tS		2.5		µs	±200mV output step	4
PWM Edge Recovery Settling Time	tS_PWM		500		ns	0 to 50V edges: 500V/μs rise/fall times, VSENSE = 0mV (VRS+ = VRS-)	4
AC Common-Mode Rejection Ratio	AC CMRR		60		dB	100mVAC sine, f = 100kHz	4
AC Power Supply Rejection Ratio	AC PSRR		60		dB	100mVAC sine, f = 100kHz	5
Voltage Noise Density	en		150		nV/√Hz	At 10kHz	5
RS+ and RS- to GND		-42		80	V		3
RS+ to RS-		-2		2	V		3
VDD to GND	VDD	-0.3		6	V		3
REF1, REF2, GAIN1, GAIN2, OUT to GND		-0.3			V	Upper limit VDD + 0.3V	3
Continuous Current in REF1, REF2, GAIN1, GAIN2				10	mA		3
Continuous Current in OUT				10	mA		3
Continuous Current in RS+ and RS-				10	mA		3
Continuous Power Dissipation				1951.2	mW	Multilayer board, TA = +70°C, derate 24.4mW/°C above +70°C	3
Operating Temperature Range		-40		125	°C		3
Storage Temperature Range		-65		150	°C		3
Thermal Resistance, Junction to Ambient	θJA		41		°C/W	Four-layer board, 10 TDFN	3
Thermal Resistance, Junction to Case	θJC		9		°C/W	Four-layer board, 10 TDFN	3

CAD (KiCad official)

Symbol: MAX49925ATB
Footprint: Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm
3D model: TDFN-10-EP(3x3) (KiCad packages3D, STEP)
3D model files: max49925atb-etched.step / max49925atb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max49925atb.step / max49925atb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: ANALOG DEVICES datasheet (14 pp, sha256 e6713be6e8700dad, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

MAX49925ATB

Verified MAX49925ATB

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README