component
SN74AHCT74QDRQ1
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74AHCT74QDRQ1
Texas Instruments · Flip Flops · SOIC-14
SN74AHCT74QDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLR | input | Clear input for flip-flop 1; active low; asynchronously resets Q to 0 and Q̄ to 1 when low. |
| 2 | 1D | input | Data input for flip-flop 1; input data transferred to outputs on positive clock edge when PRE and CLR are inactive high. |
| 3 | 1CLK | input | Clock input for flip-flop 1; positive-edge-triggered; clock triggering occurs at voltage level independent of rise time. |
| 4 | 1PRE | input | Preset input for flip-flop 1; active low; asynchronously sets Q to 1 and Q̄ to 0 when low. |
| 5 | 1Q | output | Q output for flip-flop 1; follows D input on positive clock edge; set to 1 by PRE, reset to 0 by CLR. |
| 6 | 1Q̄ | output | Inverted Q output for flip-flop 1; complement of 1Q; set to 0 by PRE, set to 1 by CLR. |
| 7 | GND | power_in | Ground; negative supply reference. |
| 8 | 2Q̄ | output | Inverted Q output for flip-flop 2; complement of 2Q; set to 0 by PRE, set to 1 by CLR. |
| 9 | 2Q | output | Q output for flip-flop 2; follows D input on positive clock edge; set to 1 by PRE, reset to 0 by CLR. |
| 10 | 2PRE | input | Preset input for flip-flop 2; active low; asynchronously sets Q to 1 and Q̄ to 0 when low. |
| 11 | 2CLK | input | Clock input for flip-flop 2; positive-edge-triggered; clock triggering occurs at voltage level independent of rise time. |
| 12 | 2D | input | Data input for flip-flop 2; input data transferred to outputs on positive clock edge when PRE and CLR are inactive high. |
| 13 | 2CLR | input | Clear input for flip-flop 2; active low; asynchronously resets Q to 0 and Q̄ to 1 when low. |
| 14 | VCC | power_in | Positive supply voltage; operating range 4.5 V to 5.5 V per recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74AHCT74QDRQ1 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ahct74qdrq1-etched.step/sn74ahct74qdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahct74qdrq1.step/sn74ahct74qdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (16 pp, sha256
95d94ebb340468a8, retrieved 2026-09-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).