component
PIC16F1937-I
Public Made by Adomby adom
Microchip Tech Microcontrollers (MCU/MPU/SOC), TQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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Datasheet
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README
markdownPIC16F1937-I
Microchip Tech · Microcontrollers (MCU/MPU/SOC) · TQFP-44(10x10)
PIC16F1937-I from Microchip Tech, in a TQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RC7 | bidirectional | General purpose I/O RC7, also EUSART asynchronous receive RX and synchronous data DT, and LCD analog output SEG8. |
| 2 | RD4 | bidirectional | General purpose I/O RD4, also capacitive sensing input CPS12, PWM output P2D, and LCD analog output SEG17. |
| 3 | RD5 | bidirectional | General purpose I/O RD5, also capacitive sensing input CPS13, PWM output P1B, and LCD analog output SEG18. |
| 4 | RD6 | bidirectional | General purpose I/O RD6, also capacitive sensing input CPS14, PWM output P1C, and LCD analog output SEG19. |
| 5 | RD7 | bidirectional | General purpose I/O RD7, also capacitive sensing input CPS15, PWM output P1D, and LCD analog output SEG20. |
| 6 | VSS | power_in | Ground reference. |
| 7 | VDD | power_in | Positive supply. |
| 8 | RB0 | bidirectional | General purpose I/O RB0 with individually controlled interrupt-on-change and individually enabled pull-up, also external interrupt INT, SR latch input SRI, A/D channel AN12, capacitive sensing input CPS0, and LCD analog output SEG0. |
| 9 | RB1 | bidirectional | General purpose I/O RB1 with individually controlled interrupt-on-change and individually enabled pull-up, also A/D channel AN10, comparator negative input C12IN3-, capacitive sensing input CPS1, and LCD analog input VLCD1. |
| 10 | RB2 | bidirectional | General purpose I/O RB2 with individually controlled interrupt-on-change and individually enabled pull-up, also A/D channel AN8, capacitive sensing input CPS2, and LCD analog input VLCD2. |
| 11 | RB3 | bidirectional | General purpose I/O RB3 with individually controlled interrupt-on-change and individually enabled pull-up, also A/D channel AN9, comparator negative input C12IN2-, capacitive sensing input CPS3, CCP2/P2A output (pin function selectable via APFCON), and LCD analog input VLCD3. |
| 12 | NC | unconnected | Not connected; no function is assigned to this pin in the pin diagram. |
| 13 | NC | unconnected | Not connected; no function is assigned to this pin in the pin diagram. |
| 14 | RB4 | bidirectional | General purpose I/O RB4 with individually controlled interrupt-on-change and individually enabled pull-up, also A/D channel AN11, capacitive sensing input CPS4, and LCD analog output COM0. |
| 15 | RB5 | bidirectional | General purpose I/O RB5 with individually controlled interrupt-on-change and individually enabled pull-up, also A/D channel AN13, capacitive sensing input CPS5, Timer1 gate input T1G, CCP3/P3A (pin function selectable via APFCON), and LCD analog output COM1. |
| 16 | RB6 | bidirectional | General purpose I/O RB6 with individually controlled interrupt-on-change and individually enabled pull-up, also ICSP serial programming clock ICSPCLK, in-circuit debug clock ICDCLK, and LCD analog output SEG14. |
| 17 | RB7 | bidirectional | General purpose I/O RB7 with individually controlled interrupt-on-change and individually enabled pull-up, also ICSP data I/O ICSPDAT, in-circuit debug data ICDDAT, and LCD analog output SEG13. |
| 18 | RE3 | input | General purpose input RE3, or Master Clear MCLR with internal pull-up, or programming voltage VPP (high-voltage programming). |
| 19 | RA0 | bidirectional | General purpose I/O RA0, also A/D channel AN0, comparator C1/C2 negative input C12IN0-, comparator C2 output C2OUT, SR latch inverting output SRNQ, slave select input SS (C2OUT, SRNQ and SS selectable via APFCON), filter capacitor VCAP (PIC16F1934/6/7 only), and LCD analog output SEG12. |
| 20 | RA1 | bidirectional | General purpose I/O RA1, also A/D channel AN1, comparator C1/C2 negative input C12IN1-, and LCD analog output SEG7. |
| 21 | RA2 | bidirectional | General purpose I/O RA2, also A/D channel AN2, A/D negative voltage reference input VREF-, comparator C2 positive input C2IN+, voltage reference output DACOUT, and LCD analog output COM2. |
| 22 | RA3 | bidirectional | General purpose I/O RA3, also A/D channel AN3, A/D positive voltage reference input VREF+, comparator C1 positive input C1IN+, and LCD analog output SEG15. |
| 23 | RA4 | bidirectional | General purpose I/O RA4, also comparator C1 output C1OUT, capacitive sensing input CPS6, Timer0 clock input T0CKI (Schmitt Trigger), SR latch non-inverting output SRQ, and LCD analog output SEG4. |
| 24 | RA5 | bidirectional | General purpose I/O RA5, also A/D channel AN4, comparator C2 output C2OUT, capacitive sensing input CPS7, SR latch inverting output SRNQ, slave select input SS, filter capacitor VCAP (PIC16F1934/6/7 only), and LCD analog output SEG5. |
| 25 | RE0 | bidirectional | General purpose I/O RE0, also A/D channel AN5, CCP3/P3A PWM function (pin function selectable via APFCON), and LCD analog output SEG21. |
| 26 | RE1 | bidirectional | General purpose I/O RE1, also A/D channel AN6, PWM output P3B, and LCD analog output SEG22. |
| 27 | RE2 | bidirectional | General purpose I/O RE2, also A/D channel AN7, CCP5 capture/compare/PWM, and LCD analog output SEG23. |
| 28 | VDD | power_in | Positive supply. |
| 29 | VSS | power_in | Ground reference. |
| 30 | RA7 | bidirectional | General purpose I/O RA7, also crystal/resonator input OSC1 (LP, XT, HS modes), external clock input CLKIN (EC mode), and LCD analog output SEG2. |
| 31 | RA6 | bidirectional | General purpose I/O RA6, also crystal/resonator output OSC2 (LP, XT, HS modes), FOSC/4 output CLKOUT, filter capacitor VCAP (PIC16F1934/6/7 only), and LCD analog output SEG1. |
| 32 | RC0 | bidirectional | General purpose I/O RC0, also Timer1 oscillator output T1OSO, Timer1 clock input T1CKI, and PWM output P2B (pin function selectable via APFCON). |
| 33 | NC | unconnected | Not connected; no function is assigned to this pin in the pin diagram. |
| 34 | NC | unconnected | Not connected; no function is assigned to this pin in the pin diagram. |
| 35 | RC1 | bidirectional | General purpose I/O RC1, also Timer1 oscillator input T1OSI, CCP2 capture/compare/PWM and PWM output P2A (pin function selectable via APFCON). |
| 36 | RC2 | bidirectional | General purpose I/O RC2, also CCP1 capture/compare/PWM, PWM output P1A, and LCD analog output SEG3. |
| 37 | RC3 | bidirectional | General purpose I/O RC3, also SPI clock SCK, I2C clock SCL (open-drain), and LCD analog output SEG6. |
| 38 | RD0 | bidirectional | General purpose I/O RD0, also capacitive sensing input CPS8 and LCD analog output COM3. |
| 39 | RD1 | bidirectional | General purpose I/O RD1, also capacitive sensing input CPS9 and CCP4 capture/compare/PWM. |
| 40 | RD2 | bidirectional | General purpose I/O RD2, also capacitive sensing input CPS10 and PWM output P2B. |
| 41 | RD3 | bidirectional | General purpose I/O RD3, also capacitive sensing input CPS11, PWM output P2C, and LCD analog output SEG16. |
| 42 | RC4 | bidirectional | General purpose I/O RC4, also SPI data input SDI, I2C data I/O SDA (open-drain), Timer1 gate input T1G, and LCD analog output SEG11. |
| 43 | RC5 | bidirectional | General purpose I/O RC5, also SPI data output SDO and LCD analog output SEG10. |
| 44 | RC6 | bidirectional | General purpose I/O RC6, also EUSART asynchronous transmit TX, synchronous clock CK, and LCD analog output SEG9. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | TQFP-44(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 44 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Ambient temperature under bias | TA | -40 | 125 | °C | 379 | ||
| Storage temperature | TSTG | -65 | 150 | °C | 379 | ||
| Voltage on VDD with respect to VSS | VDD | -0.3 | 6.5 | V | 379 | ||
| Voltage on VCAP pin with respect to VSS | VCAP | -0.3 | 4 | V | 379 | ||
| Voltage on MCLR with respect to VSS | VMCLR | -0.3 | 9 | V | 379 | ||
| Voltage on all other pins with respect to VSS | VPIN | -0.3 | V | Printed maximum is (VDD + 0.3V) | 379 | ||
| Maximum current out of VSS pin | IVSS | 255 | mA | -40°C ≤ TA ≤ +85°C for industrial; footnote says for 28-pin devices | 379 | ||
| Maximum current into VDD pin | IVDD | 170 | mA | -40°C ≤ TA ≤ +85°C for industrial; footnote says for 28-pin devices | 379 | ||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 379 | ||
| Maximum output current sunk by any I/O pin | IOL | 25 | mA | 379 | |||
| Maximum output current sourced by any I/O pin | IOH | 25 | mA | 379 | |||
| Thermal resistance junction to ambient, 44-pin TQFP | θJA | 46 | °C/W | 44-pin TQFP package | 392 | ||
| Thermal resistance junction to case, 44-pin TQFP | θJC | 14.5 | °C/W | 44-pin TQFP package | 392 | ||
| Maximum junction temperature | TJMAX | 150 | °C | 392 | |||
| Supply voltage VDD (PIC16F, FOSC ≤ 16 MHz) | VDD | 1.8 | 5.5 | V | FOSC ≤ 16 MHz | 382 | |
| Supply voltage VDD (PIC16F, FOSC ≤ 32 MHz) | VDD | 2.3 | 5.5 | V | FOSC ≤ 32 MHz (Note 2: PLL required for 32 MHz) | 382 | |
| RAM data retention voltage | VDR | 1.7 | V | Device in Sleep mode | 382 | ||
| VDD rise rate to ensure internal POR signal | SVDD | 0.05 | V/ms | See Section 6.1 | 382 | ||
| Fixed Voltage Reference voltage for ADC | VADFVR | -8 | 6 | % | 1.024V, VDD ≥ 2.5V; 2.048V, VDD ≥ 2.5V; 4.096V, VDD ≥ 4.75V | 382 | |
| Fixed Voltage Reference voltage for Comparator and DAC | VCDAFVR | -11 | 7 | % | 1.024V, VDD ≥ 2.5V; 2.048V, VDD ≥ 2.5V; 4.096V, VDD ≥ 4.75V | 382 | |
| Fixed Voltage Reference voltage for LCD bias | VLCDFVR | -11 | 10 | % | 3.072V, VDD ≥ 3.6V | 382 | |
| External clock input frequency, EC high-power mode | FOSC | 20 | MHz | EC Oscillator mode (high); printed minimum is DC | 394 | ||
| Oscillator frequency, HS mode | FOSC | 1 | 20 | MHz | HS Oscillator mode, VDD > 2.7V | 394 | |
| Oscillator frequency, XT mode | FOSC | 0.1 | 4 | MHz | XT Oscillator mode | 394 | |
| Internal calibrated HFINTOSC frequency tolerance | HFOSC | -2 | 2 | % | 0°C ≤ TA ≤ +60°C, VDD ≥ 2.5V | 395 | |
| Internal calibrated HFINTOSC frequency tolerance | HFOSC | -3 | 3 | % | 60°C ≤ TA ≤ 85°C, VDD ≥ 2.5V | 395 | |
| Internal calibrated HFINTOSC frequency tolerance | HFOSC | -5 | 5 | % | -40°C ≤ TA ≤ +125°C | 395 | |
| MCLR pulse width (low) | TMCL | 2 | µs | 399 | |||
| Low-power watchdog timer time-out period | TWDTLP | 10 | 16 | 27 | ms | VDD = 3.3V-5V; 1:16 prescaler used | 399 |
| Power-up Timer period, PWRTE = 0 | TPWRT | 40 | 65 | 140 | ms | PWRTE = 0 | 399 |
| Brown-out Reset voltage, BORV = 2.5V | VBOR | 2.38 | 2.5 | 2.73 | V | BORV = 2.5V | 399 |
| Brown-out Reset voltage, BORV = 1.9V | VBOR | 1.8 | 1.9 | 2.11 | V | BORV = 1.9V | 399 |
| Brown-out Reset hysteresis | VHYST | 0 | 25 | 60 | mV | -40°C to +85°C | 399 |
| Brown-out Reset DC response time | TBORDC | 1 | 3 | 35 | µs | VDD ≤ VBOR | 399 |
| FOSC to CLKOUT | OS11 | 70 | ns | VDD = 3.3-5.0V | 397 | ||
| FOSC to CLKOUT | OS12 | 72 | ns | VDD = 3.3-5.0V | 397 | ||
| PLL oscillator frequency range | F10 | 4 | 8 | MHz | 395 | ||
| On-chip VCO system frequency | F11 | 16 | 32 | MHz | 395 | ||
| PLL start-up time (lock time) | F12 | 2 | ms | 395 | |||
| CLKOUT stability (jitter) | F13 | -0.25 | 0.25 | % | 395 | ||
| Integral error | EIL | -1.7 | 1.7 | LSb | VREF = 3.0V | 401 | |
| Offset error | EOFF | -2.5 | 2.5 | LSb | VREF = 3.0V | 401 | |
| Reference voltage | VREF | 1.8 | V | VREF = (VREF+ minus VREF-); printed maximum is VDD | 401 | ||
| A/D clock period | TAD | 1 | 9 | µs | TOSC-based | 401 | |
| Recommended impedance of analog voltage source | ZAIN | 10 | kΩ | Can go higher if external 0.01µF capacitor is present on input pin | 401 | ||
| Comparator input offset voltage | CM01 VIOFF | -60 | 60 | mV | High-Power mode; typical printed as ±7.5 mV | 403 | |
| Comparator response time rising edge | TRESP | 400 | 800 | ns | High-Power mode | 403 | |
| Comparator response time falling edge | TRESP | 200 | 400 | ns | High-Power mode | 403 | |
| Comparator mode change to output valid | TMC2OV | 10 | µs | Characterized, not tested | 403 | ||
| DAC settling time | CST | 10 | µs | DACR<4:0> transitions from 0000 to 1111 | 403 | ||
| Synchronous transmit clock high to data-out valid | TCKH2DTV | 80 | ns | 3.0-5.5V | 404 | ||
| Synchronous transmit clock high to data-out valid | TCKH2DTV | 100 | ns | 1.8-5.5V | 404 | ||
| Data-hold before CK (DT hold time) | TDTV2CKL | 10 | ns | SYNC RCV (Master and Slave) | 404 | ||
| Data-hold after CK (DT hold time) | TCKL2DTL | 15 | ns | SYNC RCV (Master and Slave) | 404 | ||
| Timer1 oscillator input frequency range | FT1 | 32.4 | 32.768 | 33.1 | kHz | Oscillator enabled by setting T1OSCEN | 400 |
| Output low voltage, I/O ports | VOL | 0.6 | V | IOL = 8mA, VDD = 5V; IOL = 6mA, VDD = 3.3V; IOL = 1.8mA, VDD = 1.8V | 389 | ||
| Input leakage current, I/O ports | IIL | -5 | 5 | nA | VSS ≤ VPIN ≤ VDD, pin at high-impedance @ 85°C | 389 |
CAD (KiCad official)
- Symbol:
PIC16F1937-I - Footprint:
Package_QFP:TQFP-44_10x10mm_P0.8mm - 3D model: TQFP-44(10x10) (KiCad packages3D, STEP)
- 3D model files:
pic16f1937-i-etched.step/pic16f1937-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16f1937-i.step/pic16f1937-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (472 pp, sha256
9250c7993972a4aa, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).