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STM32C031K4U6
Public Made by Adomby adom
STMicroelectronics Microcontrollers (MCU/MPU/SOC), UFQFPN-32(5x5). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTM32C031K4U6
STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · UFQFPN-32(5x5)
STM32C031K4U6 from STMicroelectronics, in a UFQFPN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PB9 | bidirectional | 5 V-tolerant I/O (FT) with alternate functions IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA, EVENTOUT. |
| 2 | PC14-OSCX_IN | bidirectional | 5 V-tolerant I/O (PC14 at reset) with OSCX_IN oscillator input additional function and AFs USART1_TX, TIM1_ETR, TIM1_BKIN2, IR_OUT, USART2_RTS_DE_CK, TIM17_CH1, TIM3_CH2, I2C1_SDA, EVENTOUT. |
| 3 | PC15-OSCX_OUT | bidirectional | 5 V-tolerant I/O (PC15 at reset) with OSCX_OUT oscillator output additional function and AFs OSC32_EN, OSC_EN, TIM1_ETR, TIM3_CH3. |
| 4 | VDD/VDDA | power_in | Digital and analog supply pin; operating range 2.0 V to 3.6 V, to be decoupled with 100 nF plus 4.7 µF ceramic capacitors close to the pin. |
| 5 | VSS/VSSA | power_in | Digital and analog ground pin. |
| 6 | PF2-NRST | bidirectional | Bidirectional reset pin with embedded weak pull-up (FT); alternate functions MCO, TIM1_CH4; additional function NRST. |
| 7 | PA0 | bidirectional | 5 V-tolerant I/O with AFs USART2_CTS, TIM16_CH1, USART1_TX, TIM1_CH1; additional functions ADC_IN0, WKUP1. |
| 8 | PA1 | bidirectional | 5 V-tolerant I/O with AFs SPI1_SCK/I2S1_CK, USART2_RTS_DE_CK, TIM17_CH1, USART1_RX, TIM1_CH2, I2C1_SMBA, EVENTOUT; additional function ADC_IN1. |
| 9 | PA2 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, USART2_TX, TIM16_CH1N, TIM3_ETR, TIM1_CH3; additional functions ADC_IN2, WKUP4, LSCO. |
| 10 | PA3 | bidirectional | 5 V-tolerant I/O with AFs USART2_RX, TIM1_CH1N, TIM1_CH4, EVENTOUT; additional function ADC_IN3. |
| 11 | PA4 | bidirectional | 5 V-tolerant I/O with AFs SPI1_NSS/I2S1_WS, USART2_TX, TIM1_CH2N, TIM14_CH1, TIM17_CH1N, EVENTOUT; additional functions ADC_IN4, RTC_TS, RTC_OUT1, WKUP2. |
| 12 | PA5 | bidirectional | 5 V-tolerant I/O with AFs SPI1_SCK/I2S1_CK, USART2_RX, TIM1_CH3N, TIM1_CH1, EVENTOUT; additional function ADC_IN5. |
| 13 | PA6 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MISO/I2S1_MCK, TIM3_CH1, TIM1_BKIN, TIM16_CH1; additional function ADC_IN6. |
| 14 | PA7 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM1_CH1N, TIM14_CH1, TIM17_CH1; additional function ADC_IN7. |
| 15 | PB0 | bidirectional | 5 V-tolerant I/O with AFs SPI1_NSS/I2S1_WS, TIM3_CH3, TIM1_CH2N; additional function ADC_IN17. |
| 16 | PB1 | bidirectional | 5 V-tolerant I/O with AFs TIM14_CH1, TIM3_CH4, TIM1_CH3N, TIM1_CH2N, EVENTOUT; additional function ADC_IN18. |
| 17 | PB2 | bidirectional | 5 V-tolerant I/O with AFs USART1_RX, MCO2, EVENTOUT; additional function ADC_IN19. |
| 18 | PA8 | bidirectional | 5 V-tolerant I/O with AFs MCO, USART2_TX, TIM1_CH1, EVENTOUT, SPI1_NSS/I2S1_WS, TIM1_CH2N, TIM1_CH3N, TIM3_CH3, TIM3_CH4, TIM14_CH1, USART1_RX, MCO2; additional function ADC_IN8. |
| 19 | PA9 | bidirectional | 5 V-tolerant I/O with AFs MCO, USART1_TX, TIM1_CH2, TIM3_ETR, I2C1_SCL, EVENTOUT; can be remapped in place of PA11 via SYSCFG_CFGR1. |
| 20 | PC6 | bidirectional | 5 V-tolerant I/O with alternate function TIM3_CH1. |
| 21 | PA10 | bidirectional | 5 V-tolerant I/O with AFs USART1_RX, TIM1_CH3, MCO2, TIM17_BKIN, I2C1_SDA, EVENTOUT; can be remapped in place of PA12 via SYSCFG_CFGR1. |
| 22 | PA11 [PA9] | bidirectional | 5 V-tolerant I/O with AFs SPI1_MISO/I2S1_MCK, USART1_CTS, TIM1_CH4, TIM1_BKIN2; additional function ADC_IN11; PA9 can be remapped onto this pin via SYSCFG_CFGR1. |
| 23 | PA12 [PA10] | bidirectional | 5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, USART1_RTS_DE_CK, TIM1_ETR, I2S_CKIN; additional function ADC_IN12; PA10 can be remapped onto this pin via SYSCFG_CFGR1. |
| 24 | PA13 | bidirectional | 5 V-tolerant I/O, SWDIO at reset with internal pull-up active; AFs IR_OUT, TIM3_ETR, USART2_RX, EVENTOUT; additional function ADC_IN13. |
| 25 | PA14-BOOT0 | bidirectional | 5 V-tolerant I/O, SWCLK at reset with internal pull-down active; AFs USART2_TX, EVENTOUT, SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK; additional functions ADC_IN14, BOOT0. |
| 26 | PA15 | bidirectional | 5 V-tolerant I/O with AFs SPI1_NSS/I2S1_WS, USART2_RX, TIM1_CH1, MCO2, USART1_RTS_DE_CK, EVENTOUT. |
| 27 | PB3 | bidirectional | 5 V-tolerant I/O with AFs SPI1_SCK/I2S1_CK, TIM1_CH2, TIM3_CH2, USART1_RTS_DE_CK, EVENTOUT. |
| 28 | PB4 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MISO/I2S1_MCK, TIM3_CH1, USART1_CTS, TIM17_BKIN, EVENTOUT. |
| 29 | PB5 | bidirectional | 5 V-tolerant I/O with AFs SPI1_MOSI/I2S1_SD, TIM3_CH2, TIM16_BKIN, TIM3_CH3, I2C1_SMBA; additional function WKUP6. |
| 30 | PB6 | bidirectional | 5 V-tolerant I/O with AFs USART1_TX, TIM1_CH3, TIM16_CH1N, TIM3_CH3, USART1_RTS_DE_CK, USART1_CTS, I2C1_SCL, I2C1_SMBA, SPI1 signals, TIM1_CH2, TIM3_CH1/CH2, TIM16_BKIN, TIM17_BKIN; additional function WKUP3. |
| 31 | PB7 | bidirectional | 5 V-tolerant I/O with AFs USART1_RX, TIM1_CH4, TIM17_CH1N, TIM3_CH4, I2C1_SDA, EVENTOUT, USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL; additional function RTC_REFIN. |
| 32 | PB8 | bidirectional | 5 V-tolerant I/O with AFs USART2_CTS, TIM16_CH1, TIM3_CH1, I2C1_SCL, EVENTOUT. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | UFQFPN-32(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
STM32C031K4U6 - Footprint:
Package_DFN_QFN:UFQFPN-32-1EP_5x5mm_P0.5mm_EP3.5x3.5mm - 3D model: UFQFPN-32(5x5) (KiCad packages3D, STEP)
- 3D model files:
stm32c031k4u6-etched.step/stm32c031k4u6-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stm32c031k4u6.step/stm32c031k4u6.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (108 pp, sha256
c0de50247b672919, retrieved 2026-10-03, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).