component
CD4066BQDRQ1
Public Made by Adomby adom
Texas Instruments Analog Switches, Multiplexers, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownCD4066BQDRQ1
Texas Instruments · Analog Switches, Multiplexers · SOIC-14
CD4066BQDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SIG A IN/OUT | bidirectional | Signal terminal of switch A, usable as either input or output, with the signal level kept between VSS and VDD. |
| 2 | SIG A OUT/IN | bidirectional | Signal terminal of switch A, usable as either output or input, with the signal level kept between VSS and VDD. |
| 3 | SIG B OUT/IN | bidirectional | Signal terminal of switch B, usable as either output or input, with the signal level kept between VSS and VDD. |
| 4 | SIG B IN/OUT | bidirectional | Signal terminal of switch B, usable as either input or output, with the signal level kept between VSS and VDD. |
| 5 | CONTROL B | input | Control input for switch B: VDD (logic 1) turns the switch on and VSS (logic 0) turns it off. |
| 6 | CONTROL C | input | Control input for switch C: VDD (logic 1) turns the switch on and VSS (logic 0) turns it off. |
| 7 | VSS | power_in | Negative supply and reference terminal; all supply voltages (VDD range up to 20 V absolute maximum) are referenced to this pin. |
| 8 | SIG C IN/OUT | bidirectional | Signal terminal of switch C, usable as either input or output, with the signal level kept between VSS and VDD. |
| 9 | SIG C OUT/IN | bidirectional | Signal terminal of switch C, usable as either output or input, with the signal level kept between VSS and VDD. |
| 10 | SIG D OUT/IN | bidirectional | Signal terminal of switch D, usable as either output or input, with the signal level kept between VSS and VDD. |
| 11 | SIG D IN/OUT | bidirectional | Signal terminal of switch D, usable as either input or output, with the signal level kept between VSS and VDD. |
| 12 | CONTROL D | input | Control input for switch D: VDD (logic 1) turns the switch on and VSS (logic 0) turns it off. |
| 13 | CONTROL A | input | Control input for switch A: VDD (logic 1) turns the switch on and VSS (logic 0) turns it off. |
| 14 | VDD | power_in | Positive supply terminal; recommended supply voltage is 3 V to 18 V referenced to VSS. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Interface |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Quiescent device current, -40°C, VDD=5 V | IDD | 0.25 | µA | VIN (V)=0.5, VDD (V)=5 | 4 | ||
| Quiescent device current, 125°C, VDD=5 V | IDD | 7.5 | µA | VIN (V)=0.5, VDD (V)=5 | 4 | ||
| Quiescent device current, 25°C, VDD=5 V | IDD | 0.01 | 0.25 | µA | VIN (V)=0.5, VDD (V)=5 | 4 | |
| Quiescent device current, -40°C, VDD=10 V | IDD | 0.5 | µA | VIN (V)=0.10, VDD (V)=10 | 4 | ||
| Quiescent device current, 125°C, VDD=10 V | IDD | 15 | µA | VIN (V)=0.10, VDD (V)=10 | 4 | ||
| Quiescent device current, 25°C, VDD=10 V | IDD | 0.01 | 0.5 | µA | VIN (V)=0.10, VDD (V)=10 | 4 | |
| Quiescent device current, -40°C, VDD=15 V | IDD | 1 | µA | VIN (V)=0.15, VDD (V)=15 | 4 | ||
| Quiescent device current, 125°C, VDD=15 V | IDD | 30 | µA | VIN (V)=0.15, VDD (V)=15 | 4 | ||
| Quiescent device current, 25°C, VDD=15 V | IDD | 0.01 | 1 | µA | VIN (V)=0.15, VDD (V)=15 | 4 | |
| Quiescent device current, -40°C, VDD=20 V | IDD | 5 | µA | VIN (V)=0.20, VDD (V)=20 | 4 | ||
| Quiescent device current, 125°C, VDD=20 V | IDD | 150 | µA | VIN (V)=0.20, VDD (V)=20 | 4 | ||
| Quiescent device current, 25°C, VDD=20 V | IDD | 0.02 | 5 | µA | VIN (V)=0.20, VDD (V)=20 | 4 | |
| On-state resistance, -40°C, VDD=5 V | ron | 850 | Ω | VC = VDD, RL = 10 kΩ, Vis = VSS to VDD | 4 | ||
| On-state resistance, 125°C, VDD=5 V | ron | 1300 | Ω | VC = VDD, RL = 10 kΩ, Vis = VSS to VDD | 4 | ||
| On-state resistance, 25°C, VDD=5 V | ron | 470 | 1050 | Ω | VC = VDD, RL = 10 kΩ, Vis = VSS to VDD | 4 | |
| On-state resistance, -40°C, VDD=10 V | ron | 330 | Ω | VC = VDD, RL = 10 kΩ, Vis = VSS to VDD | 4 | ||
| On-state resistance, 125°C, VDD=10 V | ron | 550 | Ω | VC = VDD, RL = 10 kΩ, Vis = VSS to VDD | 4 | ||
| On-state resistance, 25°C, VDD=10 V | ron | 180 | 400 | Ω | VC = VDD, RL = 10 kΩ, Vis = VSS to VDD | 4 | |
| On-state resistance, -40°C, VDD=15 V | ron | 210 | Ω | VC = VDD, RL = 10 kΩ, Vis = VSS to VDD | 4 | ||
| On-state resistance, 125°C, VDD=15 V | ron | 320 | Ω | VC = VDD, RL = 10 kΩ, Vis = VSS to VDD | 4 | ||
| On-state resistance, 25°C, VDD=15 V | ron | 125 | 240 | Ω | VC = VDD, RL = 10 kΩ, Vis = VSS to VDD | 4 | |
| On-state resistance difference between any two switches, VDD=5 V | Δron | 15 | Ω | RL = 10 kΩ, VC = VDD | 4 | ||
| On-state resistance difference between any two switches, VDD=10 V | Δron | 10 | Ω | RL = 10 kΩ, VC = VDD | 4 | ||
| On-state resistance difference between any two switches, VDD=15 V | Δron | 5 | Ω | RL = 10 kΩ, VC = VDD | 4 | ||
| Input/output leakage current (switch off), -40°C | -0.1 | 0.1 | µA | VDD=18 V; VC = 0 V, Vis = 18 V, Vos = 0 V; and VC = 0 V, Vis = 0 V, Vos = 18 V | 4 | ||
| Input/output leakage current (switch off), 125°C | -1 | 1 | µA | VDD=18 V; VC = 0 V, Vis = 18 V, Vos = 0 V; and VC = 0 V, Vis = 0 V, Vos = 18 V | 4 | ||
| Input/output leakage current (switch off), 25°C | -0.1 | 0.1 | µA | VDD=18 V; VC = 0 V, Vis = 18 V, Vos = 0 V; and VC = 0 V, Vis = 0 V, Vos = 18 V | 4 | ||
| Control input low voltage, VDD=5 V | VILC | 1 | V | /Iis/ < 10 mA; Vis = VSS, VOS = VDD; and Vis = VDD, VOS = VSS | 5 | ||
| Control input low voltage, VDD=10 V | VILC | 2 | V | /Iis/ < 10 mA; Vis = VSS, VOS = VDD; and Vis = VDD, VOS = VSS | 5 | ||
| Control input low voltage, VDD=15 V | VILC | 2 | V | /Iis/ < 10 mA; Vis = VSS, VOS = VDD; and Vis = VDD, VOS = VSS | 5 | ||
| Control input high voltage, VDD=5 V | VIHC | 3.5 | V | See Figure 6 | 5 | ||
| Control input high voltage, VDD=10 V | VIHC | 7 | V | See Figure 6 | 5 | ||
| Control input high voltage, VDD=15 V | VIHC | 11 | V | See Figure 6 | 5 | ||
| Input current, -40°C | IIN | -0.1 | 0.1 | µA | Vis ≤ VDD, VDD, VSS = 18 V | 5 | |
| Input current, 125°C | IIN | -1 | 1 | µA | Vis ≤ VDD, VDD, VSS = 18 V | 5 | |
| Input current, 25°C | IIN | -0.1 | 0.1 | µA | Vis ≤ VDD, VDD, VSS = 18 V | 5 | |
| Switch output voltage MIN, VDD=5 V, Vis=0 V | Vos | 0.4 | V | VDD=5 V, Vis=0 V; Iis (mA) 0.61 / 0.51 / 0.36 at -40 / 25 / 125°C | 5 | ||
| Switch output voltage MAX, VDD=5 V, Vis=5 V | Vos | 4.6 | V | VDD=5 V, Vis=5 V; Iis (mA) -0.61 / -0.51 / -0.36 at -40 / 25 / 125°C | 5 | ||
| Switch output voltage MIN, VDD=15 V, Vis=0 V | Vos | 1.5 | V | VDD=15 V, Vis=0 V; Iis (mA) 4 / 3.4 / 2.4 at -40 / 25 / 125°C | 5 | ||
| Switch output voltage MAX, VDD=15 V, Vis=15 V | Vos | 13.5 | V | VDD=15 V, Vis=15 V; Iis (mA) -4 / -3.4 / -2.4 at -40 / 25 / 125°C | 5 | ||
| Propagation delay, signal input to signal output, VDD=5 V | tpd | 20 | 40 | ns | RL = 200 kΩ, VC = VDD, VSS = GND, CL = 50 pF, Vis = 10 V (square wave centered on 5 V), tr, tf = 20 ns | 4 | |
| Propagation delay, signal input to signal output, VDD=10 V | tpd | 10 | 20 | ns | RL = 200 kΩ, VC = VDD, VSS = GND, CL = 50 pF, Vis = 10 V (square wave centered on 5 V), tr, tf = 20 ns | 4 | |
| Propagation delay, signal input to signal output, VDD=15 V | tpd | 7 | 15 | ns | RL = 200 kΩ, VC = VDD, VSS = GND, CL = 50 pF, Vis = 10 V (square wave centered on 5 V), tr, tf = 20 ns | 4 | |
| Supply voltage VDD | VDD | 3 | 18 | V | 3 | ||
| Operating free-air temperature TA | TA | -40 | 125 | °C | 3 | ||
| DC supply-voltage range (referenced to VSS) | VDD | -0.5 | 20 | V | Voltages referenced to VSS terminal | 3 | |
| Input voltage range, all inputs | Vis | -0.5 | V | Printed upper limit is VDD + 0.5 V | 3 | ||
| DC input current, any one input | IIN | -10 | 10 | mA | Any one input | 3 | |
| Storage temperature range | Tstg | -65 | 150 | °C | 3 | ||
| Lead temperature (during soldering) | 265 | °C | At distance 1/16 ± 1/32 inch from case for 10 s max | 3 | |||
| ESD, Human-Body Model (HBM) | 500 | V | Human-Body Model (HBM); tested per AEC-Q100 | 3 | |||
| Package thermal impedance, D package | θJA | 86 | °C/W | D package; calculated per JESD 51-7 | 3 | ||
| Junction-to-ambient thermal resistance | θJA | 92.4 | °C/W | D package, 14 pins | 3 | ||
| Junction-to-case (top) thermal resistance | θJCtop | 52.5 | °C/W | D package, 14 pins | 3 | ||
| Junction-to-board thermal resistance | θJB | 46.7 | °C/W | D package, 14 pins | 3 | ||
| Junction-to-top characterization parameter | ψJT | 46.4 | °C/W | D package, 14 pins | 3 | ||
| Junction-to-board characterization parameter | ψJB | 46.4 | °C/W | D package, 14 pins | 3 |
CAD (KiCad official)
- Symbol:
CD4066BQDRQ1 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
cd4066bqdrq1-etched.step/cd4066bqdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);cd4066bqdrq1.step/cd4066bqdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (17 pp, sha256
907be3b0eb322997, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).