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NCV57001DWR2G

Public Made by Adom

by adom

onsemi Isolators - Gate Drivers, SOIC-16-300mil. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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NCV57001DWR2G

onsemi · Isolators - Gate Drivers · SOIC-16-300mil

NCV57001DWR2G from onsemi, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VEE2A power_in Output-side negative power supply (mirror of VEE2). A quality bypass capacitor to GND2 close to the pin is required. Tie to GND2 for unipolar supply operation. Rated -10 V to +0.3 V vs GND2.
2 DESAT bidirectional Desaturation detection input for IGBT short-circuit protection. An internal I_DESAT-CHG current source charges an external blanking capacitor each ON cycle. When DESAT exceeds V_DESAT-THR the output is driven low and /FLT is asserted. A 5 us mute time applies to IN+/IN- once DESAT trips.
3 GND2 power_in Output-side gate-drive reference; connects to IGBT emitter or FET source.
4 N/C unconnected Not connected internally. Leave floating or tie to a nearby plane per PCB best practice.
5 VDD2 power_in Output-side positive power supply. Operating range from UVLO2 up to its maximum (25 V absolute max vs GND2). A quality bypass capacitor to GND2 placed close to the pin is required.
6 OUT output Gate-driver output providing source/sink drive to the IGBT/FET gate (typ +4 A / -6 A peak). Actively pulled low during start-up and under fault conditions.
7 CLAMP bidirectional Active Miller clamp pin that provides a low-impedance path for the IGBT/FET gate during OFF to prevent parasitic turn-on. An internal N-FET turns on when this pin drops below VEE2 + V_CLAMP-THR. Tie directly to the gate with minimum trace length. Max clamp current 2.5 A pk.
8 VEE2 power_in Output-side negative power supply. Tie to GND2 for unipolar operation, or bias to a negative rail (down to -10 V vs GND2) for negative gate-off drive. Requires bypass capacitor to GND2.
9 GND1 power_in Input-side (logic) ground reference. Both pin 9 and pin 16 are internally tied together and must be connected on the PCB.
10 IN+ input Non-inverting gate-driver input. Internally clamped to VDD1 with a 50 kOhm pull-down to ensure OUT is low with no input drive. Accepts 3.3 V / 5 V logic; minimum positive-going pulse width required at IN+ before OUT responds.
11 IN- input Inverting gate-driver input. Internally clamped to VDD1 with a 50 kOhm pull-up to ensure OUT is low with no input drive. A minimum negative-going pulse width is required at IN- before OUT responds.
12 RDY output Power-good (READY) indication output, active-high when VDD2 is good. Open-drain style with an internal 50 kOhm pull-up to VDD1; outputs from multiple drivers can be wired-OR. Max low-duration when triggered by UVLO2 is 200 ns; OUT stays low while RDY is low.
13 /FLT output Fault output (active-low) indicating that the driver has detected a DESAT condition and disabled OUT. Open-drain compatible for wired-OR with a 10 mA max sink capability.
14 /RST input Reset input, active-low, with an internal 50 kOhm pull-up to VDD1. Drive low to clear a latched DESAT fault.
15 VDD1 power_in Input-side (logic) power supply, 3.3 V to 5 V (6 V absolute max vs GND1). Bypass to GND1 with a quality decoupling capacitor.
16 GND1A power_in Input-side ground reference (shared with pin 9 GND1 internally). Both ground pins must be connected on the PCB. Labelled GND1A on the package pin-assignment diagram.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-16-300mil
Category PMIC
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • NCV57001DWR2G

CAD (KiCad official)

  • Symbol: NCV57001DWR2G
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ncv57001dwr2g-etched.step / ncv57001dwr2g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ncv57001dwr2g.step / ncv57001dwr2g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ncv57001dwr2g.step 217 KB You want the bare part, or you mark your own boards.
ncv57001dwr2g-etched.step 2.9 MB You want the part with NCV57001DWR2G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 716 faces against 267 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (22 pp, sha256 c7c1197eac993e94, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF