component
4485
Public Made by Adomby adom
HL MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown4485
HL · MOSFETs · SOP-8
4485 from HL, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET, one of three parallel source pins (S S S G along the front row of the SOP8 drawing). |
| 2 | S | passive | Source of the P-channel MOSFET, one of three parallel source pins. |
| 3 | S | passive | Source of the P-channel MOSFET, one of three parallel source pins. |
| 4 | G | input | Gate of the P-channel MOSFET, with a gate-source voltage rating of ±20 V. |
| 5 | D | passive | Drain of the P-channel MOSFET, rated -40 V drain-source and -13 A continuous at TC = 25℃, tied to the other drain pins. |
| 6 | D | passive | Drain of the P-channel MOSFET, one of four parallel drain pins. |
| 7 | D | passive | Drain of the P-channel MOSFET, one of four parallel drain pins. |
| 8 | D | passive | Drain of the P-channel MOSFET, one of four parallel drain pins. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | HL |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDSS | -40 | V | 1 | |||
| Gate-Source Voltage | VGSS | -20 | 20 | V | 1 | ||
| Continuous Drain Current | ID | -13 | A | TC=25℃ | 1 | ||
| Continuous Drain Current | ID | -8.5 | A | TC=100℃ | 1 | ||
| Pulsed Drain Current | IDM | -52 | A | 1 | |||
| Single Pulsed Avalanche Energy | EAS | 80 | mJ | VDD=-25V, VGS=-10V, L=0.1mH, IAS=-34A | 1 | ||
| Power Dissipation | PD | 3 | W | TC=25℃ | 1 | ||
| Operating and Storage Temperature Range | TJ, TSTG | -55 | 175 | ℃ | 1 | ||
| Thermal Resistance from Junction-to-Ambient | RθJA | 1.9 | ℃/W | surface mounted on 1 inch² FR-4 board, 2OZ copper | 1 | ||
| Drain-Source Breakdown Voltage | V(BR)DSS | -40 | V | VGS=0V, ID=-250µA | 2 | ||
| Gate-body Leakage Current | IGSS | -100 | 100 | nA | VDS=0V, VGS=±20V | 2 | |
| Zero Gate Voltage Drain Current | IDSS | -1 | μA | VDS=-40V, VGS=0V, TJ=25℃ | 2 | ||
| Zero Gate Voltage Drain Current | IDSS | -100 | μA | VDS=-40V, VGS=0V, TJ=100℃ | 2 | ||
| Gate-Threshold Voltage | VGS(th) | -1 | -1.5 | -2.2 | V | VDS=VGS, ID=-250µA | 2 |
| Drain-Source On-Resistance | RDS(on) | 14 | 19 | mΩ | VGS=-10V, ID=-10A | 2 | |
| Drain-Source On-Resistance | RDS(on) | 19.5 | 25 | mΩ | VGS=-4.5V, ID=-5A | 2 | |
| Continuous Source Current | IS | -13 | A | TC=25°C | 2 | ||
| Diode Forward Voltage | VSD | -1.2 | V | IS=-10A, VGS=0V | 2 | ||
| Forward Transconductance | gfs | 44 | S | VDS=-10V, ID=-10A | 2 | ||
| Input Capacitance | Ciss | 2525 | pF | VDS=-20V, VGS=0V, f=1MHz | 2 | ||
| Output Capacitance | Coss | 190 | pF | VDS=-20V, VGS=0V, f=1MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 172 | pF | VDS=-20V, VGS=0V, f=1MHz | 2 | ||
| Gate Resistance | Rg | 10 | Ω | f=1MHz | 2 | ||
| Total Gate Charge | Qg | 35 | nC | VGS=-10V, VDS=-20V, ID=-10A | 2 | ||
| Gate-Source Charge | Qgs | 5.5 | nC | VGS=-10V, VDS=-20V, ID=-10A | 2 | ||
| Gate-Drain Charge | Qgd | 8 | nC | VGS=-10V, VDS=-20V, ID=-10A | 2 | ||
| Turn-On Delay Time | td(on) | 14.5 | ns | VGS=-10V, VDS=-20V, RG=3Ω, ID=-10A | 2 | ||
| Rise Time | tr | 20.2 | ns | VGS=-10V, VDS=-20V, RG=3Ω, ID=-10A | 2 | ||
| Turn-Off Delay Time | td(off) | 32 | ns | VGS=-10V, VDS=-20V, RG=3Ω, ID=-10A | 2 | ||
| Fall Time | tf | 10 | ns | VGS=-10V, VDS=-20V, RG=3Ω, ID=-10A | 2 |
CAD (KiCad official)
- Symbol:
4485 - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
4485-etched.step/4485-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);4485.step/4485.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: HL datasheet (6 pp, sha256
d0ba8c21fd2488cc, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).