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Contents

README

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RTL8363NB-VB-CG

Realtek Semicon · Ethernet Transceivers · QFN-76

RTL8363NB-VB-CG from Realtek Semicon, in a QFN-76. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SCK/MDC bidirectional Clock signal for Master I2C EEPROM auto-download, Slave I2C-like interface, or Slave MII Management interface selected via SMI_SEL[1:0] strapping.
2 SDA/MDIO bidirectional Data signal for Master I2C EEPROM auto-download, Slave I2C-like interface, or Slave MII Management interface selected via SMI_SEL[1:0] strapping.
3 AVDDH power_in Analog High Voltage Power supply (3.135V to 3.465V).
4 P1MDIAP bidirectional Port 1 Media Dependent Interface Pair A positive; supports 1000Base-T, 100Base-TX, or 10Base-T with internal 100-ohm termination.
5 P1MDIAN bidirectional Port 1 Media Dependent Interface Pair A negative; supports 1000Base-T, 100Base-TX, or 10Base-T with internal 100-ohm termination.
6 P1MDIBP bidirectional Port 1 Media Dependent Interface Pair B positive; supports 1000Base-T, 100Base-TX, or 10Base-T with internal 100-ohm termination.
7 P1MDIBN bidirectional Port 1 Media Dependent Interface Pair B negative; supports 1000Base-T, 100Base-TX, or 10Base-T with internal 100-ohm termination.
8 AVDDL power_in Analog Low Voltage Power supply (1.045V to 1.155V).
9 P1MDICP bidirectional Port 1 Media Dependent Interface Pair C positive; used for 1000Base-T only with internal 100-ohm termination.
10 P1MDICN bidirectional Port 1 Media Dependent Interface Pair C negative; used for 1000Base-T only with internal 100-ohm termination.
11 P1MDIDP bidirectional Port 1 Media Dependent Interface Pair D positive; used for 1000Base-T only with internal 100-ohm termination.
12 P1MDIDN bidirectional Port 1 Media Dependent Interface Pair D negative; used for 1000Base-T only with internal 100-ohm termination.
13 PLLVDDL power_in PLL Low Voltage Power supply (1.045V to 1.155V).
14 AVDDH power_in Analog High Voltage Power supply (3.135V to 3.465V).
15 P3MDIAP bidirectional Port 3 Media Dependent Interface Pair A positive; supports 1000Base-T, 100Base-TX, or 10Base-T with internal 100-ohm termination.
16 P3MDIAN bidirectional Port 3 Media Dependent Interface Pair A negative; supports 1000Base-T, 100Base-TX, or 10Base-T with internal 100-ohm termination.
17 P3MDIBP bidirectional Port 3 Media Dependent Interface Pair B positive; supports 1000Base-T, 100Base-TX, or 10Base-T with internal 100-ohm termination.
18 P3MDIBN bidirectional Port 3 Media Dependent Interface Pair B negative; supports 1000Base-T, 100Base-TX, or 10Base-T with internal 100-ohm termination.
19 AVDDL power_in Analog Low Voltage Power supply (1.045V to 1.155V).
20 P3MDICP bidirectional Port 3 Media Dependent Interface Pair C positive; used for 1000Base-T only with internal 100-ohm termination.
21 P3MDICN bidirectional Port 3 Media Dependent Interface Pair C negative; used for 1000Base-T only with internal 100-ohm termination.
22 P3MDIDP bidirectional Port 3 Media Dependent Interface Pair D positive; used for 1000Base-T only with internal 100-ohm termination.
23 P3MDIDN bidirectional Port 3 Media Dependent Interface Pair D negative; used for 1000Base-T only with internal 100-ohm termination.
24 AVDDH power_in Analog High Voltage Power supply (3.135V to 3.465V).
25 AGND power_in Analog Ground connection.
26 MDIREF output Reference resistor output; connect 2.49k ohm (1% tolerance) resistor between this pin and GND.
27 AVDDL power_in Analog Low Voltage Power supply (1.045V to 1.155V).
28 RTT1 output Test pin reserved for internal use; must be left floating.
29 AVDDH power_in Analog High Voltage Power supply (3.135V to 3.465V).
30 GPIO57/INTERRUPT bidirectional Interrupt output pin that goes high or low active by register configuration when interrupt event occurs.
31 DVDDL power_in Digital Low Voltage Power supply (1.045V to 1.155V).
32 RESERVED unconnected Reserved pin; do not connect.
33 RESERVED unconnected Reserved pin; do not connect.
34 AVDDL power_in Analog Low Voltage Power supply (1.045V to 1.155V).
35 RESERVED unconnected Reserved pin; do not connect.
36 RESERVED unconnected Reserved pin; do not connect.
37 AVDDH power_in Analog High Voltage Power supply (3.135V to 3.465V).
38 NC unconnected Not Connected pin.
39 DVDDL power_in Digital Low Voltage Power supply (1.045V to 1.155V).
40 DVDDIO_1 power_in Digital I/O High Voltage Power for Extension Port 1 (1.71V to 3.465V selectable).
41 GPIO13/M1M_CRS bidirectional Extension GMAC1 (T)MII MAC Mode Carrier Sense input for 10/100Mbps MII or 20/200Mbps TMII half duplex operation.
42 GPIO19/RG1_TXD3/M1M_TXD3/M1P_RXD3 output Extension GMAC1 multifunctional output: RG1_TXD3 (RGMII transmit data), M1M_TXD3 ((T)MII MAC transmit data), or M1P_RXD3 ((T)MII PHY receive data).
43 GPIO20/RG1_TXD2/M1M_TXD2/M1P_RXD2 output Extension GMAC1 multifunctional output: RG1_TXD2 (RGMII transmit data), M1M_TXD2 ((T)MII MAC transmit data), or M1P_RXD2 ((T)MII PHY receive data).
44 GPIO21/RG1_TXD1/M1M_TXD1/M1P_RXD1 output Extension GMAC1 multifunctional output: RG1_TXD1, M1M_TXD1, M1P_RXD1, or RM1M_TXD1 (RMII transmit data).
45 GPIO22/RG1_TXD0/M1M_TXD0/M1P_RXD0 output Extension GMAC1 multifunctional output: RG1_TXD0, M1M_TXD0, M1P_RXD0, or RM1M_TXD0 (RMII transmit data).
46 GPIO23/RG1_TXCTL/M1M_TXEN/M1P_RXDV output Extension GMAC1 multifunctional output: RG1_TXCTL (RGMII), M1M_TXEN ((T)MII MAC), M1P_RXDV ((T)MII PHY), or RM1M_TXEN (RMII transmit enable).
47 GPIO24/RG1_TXCLK/M1M_TXCLK/M1P_RXCLK bidirectional Extension GMAC1 multifunctional clock: RG1_TXCLK (RGMII output), M1M_TXCLK ((T)MII MAC input), M1P_RXCLK ((T)MII PHY output), or RM1M_CLK (RMII clock, input/output).
48 GPIO28/RG1_RXCLK/M1M_RXCLK/M1P_TXCLK bidirectional Extension GMAC1 multifunctional clock: RG1_RXCLK (RGMII input), M1M_RXCLK ((T)MII MAC input), or M1P_TXCLK ((T)MII PHY output); must be pulled low with 1k ohm resistor when not used in PHY mode.
49 GPIO29/RG1_RXCTL/M1M_RXDV/M1P_TXEN input Extension GMAC1 multifunctional input: RG1_RXCTL (RGMII), M1M_RXDV ((T)MII MAC), M1P_TXEN ((T)MII PHY), or RM1M_CRS_DV (RMII carrier sense/receive data valid); must be pulled low with 1k ohm resistor when not used in some modes.
50 GPIO30/RG1_RXD0/M1M_RXD0/M1P_TXD0 input Extension GMAC1 multifunctional input: RG1_RXD0 (RGMII), M1M_RXD0 ((T)MII MAC), M1P_TXD0 ((T)MII PHY), or RM1M_RXD0 (RMII receive data).
51 GPIO31/RG1_RXD1/M1M_RXD1/M1P_TXD1 input Extension GMAC1 multifunctional input: RG1_RXD1 (RGMII), M1M_RXD1 ((T)MII MAC), M1P_TXD1 ((T)MII PHY), or RM1M_RXD1 (RMII receive data).
52 GPIO32/RG1_RXD2/M1M_RXD2/M1P_TXD2 input Extension GMAC1 multifunctional input: RG1_RXD2 (RGMII), M1M_RXD2 ((T)MII MAC), or M1P_TXD2 ((T)MII PHY transmit data).
53 GPIO33/RG1_RXD3/M1M_RXD3/M1P_TXD3 input Extension GMAC1 multifunctional input: RG1_RXD3 (RGMII), M1M_RXD3 ((T)MII MAC), or M1P_TXD3 ((T)MII PHY transmit data).
54 DVDDIO_1 power_in Digital I/O High Voltage Power for Extension Port 1 (1.71V to 3.465V selectable).
55 EN_SWR input Enable embedded switch regulator; pull high via external 4.7k ohm resistor to enable, pull low to disable.
56 GND_SWR power_in Regulator Ground connection.
57 GND_SWR power_in Regulator Ground connection.
58 LX output Embedded switch regulator inductor connection output.
59 LX output Embedded switch regulator inductor connection output.
60 LX output Embedded switch regulator inductor connection output.
61 HV_SWR power_in Regulator High Voltage Power supply input (3.135V to 3.465V).
62 HV_SWR power_in Regulator High Voltage Power supply input (3.135V to 3.465V).
63 DVDDIO power_in Digital I/O High Voltage Power for LED, Management Interface, and nRESET (3.135V to 3.465V).
64 DVDDL power_in Digital Low Voltage Power supply (1.045V to 1.155V).
65 GPIO44/P3LED2 bidirectional Port 3 LED2 output signal or general purpose I/O; indicates information defined by register or EEPROM.
66 GPO45/P3LED0/DISAUTOLOAD bidirectional Port 3 LED0 output, general purpose output, or EEPROM Auto-load disable strapping; pull high to disable or low to enable EEPROM auto-load via external 4.7k ohm resistor.
67 GPIO46/P3LED1 bidirectional Port 3 LED1 output signal or general purpose I/O; indicates information defined by register or EEPROM.
68 GPO47/P1LED2/SMI_SEL_1 bidirectional Port 1 LED2 output, general purpose output, or SMI interface selection strapping; use with SMI_SEL_0 to select CPU access interface (Slave LSB I2C, MSB I2C, MII Management, or Realtek I2C-like) via external 4.7k ohm resistor.
69 GPO48/P1LED0/MID29 bidirectional Port 1 LED0 output, general purpose output, or MID29 strapping pin; pull high for PHY ID 29 or low for ID 0 via external 4.7k ohm resistor.
70 GPIO49/P1LED1 bidirectional Port 1 LED1 output signal or general purpose I/O; indicates information defined by register or EEPROM.
71 GPO50/EN_PHY bidirectional General purpose output or Enable Embedded PHY strapping pin; pull high to enable or low to disable embedded PHY via external 4.7k ohm resistor.
72 GPO52/SMI_SEL_0 bidirectional General purpose output or SMI interface selection strapping pin; use with SMI_SEL_1 to select CPU access interface (Slave LSB I2C, MSB I2C, MII Management, or Realtek I2C-like) via external 4.7k ohm resistor.
73 AVDDH power_in Analog High Voltage Power supply; includes supply I/O power for INTERRUPT pin (3.135V to 3.465V).
74 XTALO bidirectional 25MHz Crystal Clock Output pin (±50ppm tolerance); connect to loading capacitor and ground when using crystal; keep floating when using external oscillator.
75 XTALI input 25MHz Crystal Clock Input pin (±50ppm tolerance); connect to crystal with loading capacitor to ground.
76 nRESET input System Reset Input pin with internal pull-up resistor; active low reset input to RTL8363NB-VB.
77 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Realtek Semicon
Package QFN-76
Category Interface
Pins 77

CAD (KiCad official)

  • Symbol: RTL8363NB-VB-CG
  • Footprint: Package_DFN_QFN:QFN-76-1EP_9x9mm_P0.4mm_EP3.8x3.8mm
  • 3D model: QFN-76 (KiCad packages3D, STEP)
  • 3D model files: rtl8363nb-vb-cg-etched.step / rtl8363nb-vb-cg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); rtl8363nb-vb-cg.step / rtl8363nb-vb-cg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Realtek Semicon datasheet (68 pp, sha256 926e9540bd70adcf, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF