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PIC12LF1552-E
Public Made by Adomby adom
Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPIC12LF1552-E
Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · SOIC-8
PIC12LF1552-E from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply; operating voltage range is 1.8V to 3.6V. |
| 2 | RA5/AN4/CLKIN/ADGRDB | bidirectional | General purpose I/O with AN4 ADC channel input, CLKIN external clock input (EC mode) and ADGRDB guard ring output B. |
| 3 | RA4/AN3/SDO/CLKOUT/ADGRDA | bidirectional | General purpose I/O with AN3 ADC channel input, SDO SPI data output (alternate location), CLKOUT (FOSC/4) output and ADGRDA guard ring output A. |
| 4 | RA3/MCLR/VPP | input | Input-only pin: general purpose input, Master Clear with internal weak pull-up, or VPP programming voltage; also alternate SS, SDI and SDA. |
| 5 | RA2/AN2/ADOUT/T0CKI/SDI/SDA/INT | bidirectional | General purpose I/O with AN2 ADC input, ADOUT CVD output, T0CKI Timer0 clock input, SDI/SDA (default location) and INT external interrupt. |
| 6 | RA1/AN1/VREF+/SCK/SCL/ICSPCLK | bidirectional | General purpose I/O with AN1 ADC input, VREF+ ADC positive reference input, SPI clock SCK, I2C clock SCL and ICSPCLK programming clock. |
| 7 | RA0/AN0/SDO/SS/ICSPDAT | bidirectional | General purpose I/O with AN0 ADC input, SDO SPI data output (default), SS slave select (alternate) and ICSPDAT programming data I/O. |
| 8 | VSS | power_in | Ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-8 |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 1.8 | 3.6 | V | FOSC ≤ 16 MHz | 203 | |
| Supply Voltage | VDD | 2.5 | 3.6 | V | FOSC ≤ 32 MHz | 203 | |
| RAM Data Retention Voltage | VDR | 1.5 | V | Device in Sleep mode | 203 | ||
| FVR Initial Accuracy 1.024V | VADFVR | -7 | 6 | % | 1.024V, VDD ≥ 2.5V, 85°C | 203 | |
| FVR Initial Accuracy 1.024V | VADFVR | -8 | 6 | % | 1.024V, VDD ≥ 2.5V, 125°C | 203 | |
| FVR Initial Accuracy 2.048V | VADFVR | -7 | 6 | % | 2.048V, VDD ≥ 2.5V, 85°C | 203 | |
| FVR Initial Accuracy 2.048V | VADFVR | -8 | 6 | % | 2.048V, VDD ≥ 2.5V, 125°C | 203 | |
| VDD Rise Rate for POR | SVDD | 0.05 | V/ms | 203 | |||
| Supply Current LFINTOSC 1.8V | IDD | 2.5 | 18 | µA | FOSC = 31 kHz, VDD=1.8V | 205 | |
| Supply Current LFINTOSC 3.0V | IDD | 4 | 20 | µA | FOSC = 31 kHz, VDD=3.0V | 205 | |
| Supply Current HFINTOSC 8MHz 1.8V | IDD | 0.35 | 0.7 | mA | FOSC = 8 MHz, VDD=1.8V | 205 | |
| Supply Current HFINTOSC 8MHz 3.0V | IDD | 0.5 | 1.1 | mA | FOSC = 8 MHz, VDD=3.0V | 205 | |
| Supply Current HFINTOSC 16MHz 1.8V | IDD | 0.5 | 1.2 | mA | FOSC = 16 MHz, VDD=1.8V | 205 | |
| Supply Current HFINTOSC 16MHz 3.0V | IDD | 0.75 | 1.75 | mA | FOSC = 16 MHz, VDD=3.0V | 205 | |
| Supply Current HFINTOSC PLL 32MHz | IDD | 1.4 | 3.5 | mA | FOSC = 32 MHz, VDD=3.0V | 205 | |
| Supply Current ECH 20MHz | IDD | 0.65 | 1.5 | mA | FOSC = 20 MHz, VDD=3.0V | 205 | |
| Power-down Base Current 1.8V | IPD | 0.02 | 1 | µA | VDD=1.8V, max at +85°C (8 at +125°C) | 206 | |
| Power-down Base Current 3.0V | IPD | 0.03 | 2 | µA | VDD=3.0V, max at +85°C (9 at +125°C) | 206 | |
| Input Low Voltage, TTL buffer | VIL | 0.15 | V | 1.8V ≤ VDD ≤ 3.6V; max 0.15 VDD | 207 | ||
| Input Low Voltage, Schmitt Trigger | VIL | 0.2 | V | 2.0V ≤ VDD ≤ 3.6V; max 0.2 VDD | 207 | ||
| Input Low Voltage, MCLR | VIL | 0.2 | V | max 0.2 VDD | 207 | ||
| Input High Voltage, Schmitt Trigger | VIH | 0.8 | V | 2.0V ≤ VDD ≤ 3.6V; min 0.8 VDD | 207 | ||
| Input High Voltage, MCLR | VIH | 0.8 | V | min 0.8 VDD | 207 | ||
| Input Leakage Current I/O ports | IIL | 5 | 125 | nA | VSS ≤ VPIN ≤ VDD, Pin at high-impedance at 85°C (1000 at 125°C) | 207 | |
| Input Leakage Current MCLR | IIL | 50 | 200 | nA | VSS ≤ VPIN ≤ VDD at 85°C | 207 | |
| Weak Pull-up Current | IPUR | 25 | 100 | 200 | µA | VDD = 3.3V, VPIN = VSS | 207 |
| Output Low Voltage | VOL | 0.6 | V | IOL = 6mA, VDD = 3.3V; IOL = 1.8mA, VDD = 1.8V | 207 | ||
| Output High Voltage | VOH | 0.7 | V | VDD - 0.7; IOH = 3mA, VDD = 3.3V; IOH = 1mA, VDD = 1.8V | 207 | ||
| Capacitive Loading on Output Pins | CIO | 50 | pF | All I/O pins | 207 | ||
| Brown-out Reset Voltage | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 215 |
| Brown-out Reset Voltage | VBOR | 1.8 | 1.9 | 2.05 | V | BORV = 1 | 215 |
| Ambient temperature under bias | -40 | 125 | °C | 202 | |||
| Storage temperature | -65 | 150 | °C | 202 | |||
| Voltage on VDD with respect to VSS | VDD | -0.3 | 4 | V | 202 | ||
| Voltage on MCLR with respect to Vss | MCLR | -0.3 | 9 | V | 202 | ||
| Maximum current out of VSS pin | 95 | mA | -40°C ≤ TA ≤ +125°C for extended (210 mA for industrial -40 to +85°C) | 202 | |||
| Maximum current into VDD pin | 70 | mA | -40°C ≤ TA ≤ +125°C for extended (150 mA for industrial -40 to +85°C) | 202 | |||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 202 | ||
| Maximum output current sunk by any I/O pin | 25 | mA | 202 | ||||
| Maximum output current sourced by any I/O pin | 25 | mA | 202 | ||||
| Thermal Resistance Junction to Ambient | θJA | 149.5 | °C/W | 8-pin SOIC package | 209 | ||
| Thermal Resistance Junction to Case | θJC | 39.9 | °C/W | 8-pin SOIC package | 209 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 209 |
CAD (KiCad official)
- Symbol:
PIC12LF1552-E - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
pic12lf1552-e-etched.step/pic12lf1552-e-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic12lf1552-e.step/pic12lf1552-e.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (243 pp, sha256
543a9b665abc8389, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).