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74ACT11244PWR

Public Made by Adom

by adom

Texas Instruments Buffers, Drivers, Receivers, Transceivers, TSSOP-24. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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74ACT11244PWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-24

74ACT11244PWR from Texas Instruments, in a TSSOP-24. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1Y1 tri_state Tri-state buffered output for input 1A1; driven to high impedance when 1OE is high.
2 1Y2 tri_state Tri-state buffered output for input 1A2; driven to high impedance when 1OE is high.
3 1Y3 tri_state Tri-state buffered output for input 1A3; driven to high impedance when 1OE is high.
4 1Y4 tri_state Tri-state buffered output for input 1A4; driven to high impedance when 1OE is high.
5 GND power_in Ground; center-pin configuration to minimize high-speed switching noise.
6 GND power_in Ground; center-pin configuration to minimize high-speed switching noise.
7 GND power_in Ground; center-pin configuration to minimize high-speed switching noise.
8 GND power_in Ground; center-pin configuration to minimize high-speed switching noise.
9 2Y1 tri_state Tri-state buffered output for input 2A1; driven to high impedance when 2OE is high.
10 2Y2 tri_state Tri-state buffered output for input 2A2; driven to high impedance when 2OE is high.
11 2Y3 tri_state Tri-state buffered output for input 2A3; driven to high impedance when 2OE is high.
12 2Y4 tri_state Tri-state buffered output for input 2A4; driven to high impedance when 2OE is high.
13 2OE input Active-low output enable for buffer section 2; outputs 2Y1-2Y4 driven to high impedance when high.
14 2A4 input Data input for buffer section 2, channel 4; output 2Y4 follows input when 2OE is low.
15 2A3 input Data input for buffer section 2, channel 3; output 2Y3 follows input when 2OE is low.
16 2A2 input Data input for buffer section 2, channel 2; output 2Y2 follows input when 2OE is low.
17 2A1 input Data input for buffer section 2, channel 1; output 2Y1 follows input when 2OE is low.
18 VCC power_in Supply voltage; center-pin configuration to minimize high-speed switching noise; 4.5 V to 5.5 V recommended.
19 VCC power_in Supply voltage; center-pin configuration to minimize high-speed switching noise; 4.5 V to 5.5 V recommended.
20 1A4 input Data input for buffer section 1, channel 4; output 1Y4 follows input when 1OE is low.
21 1A3 input Data input for buffer section 1, channel 3; output 1Y3 follows input when 1OE is low.
22 1A2 input Data input for buffer section 1, channel 2; output 1Y2 follows input when 1OE is low.
23 1A1 input Data input for buffer section 1, channel 1; output 1Y1 follows input when 1OE is low.
24 1OE input Active-low output enable for buffer section 1; outputs 1Y1-1Y4 driven to high impedance when high.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-24
Category Logic
Pins 24

CAD (KiCad official)

  • Symbol: 74ACT11244PWR
  • Footprint: Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm
  • 3D model: TSSOP-24 (KiCad packages3D, STEP)
  • 3D model files: 74act11244pwr-etched.step / 74act11244pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74act11244pwr.step / 74act11244pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (14 pp, sha256 a41e4787e3d3fc84, retrieved 2026-09-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF