component
PDTB123TT
Public Made by Adomby adom
Nexperia Digital Transistors, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPDTB123TT
Nexperia · Digital Transistors · SOT-23
PDTB123TT from Nexperia, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | input (base) | input | Base input of the resistor-equipped transistor, with input voltage limited to +5 V (positive) and −12 V (negative) per the limiting values. |
| 2 | GND (emitter) | power_in | Emitter, labelled GND in the pinning table, with emitter-base voltage limited to −5 V (VEBO). |
| 3 | output (collector) | output | Collector output, with output current limited to −500 mA (IO) and collector-emitter voltage limited to −50 V (VCEO). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-23 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Collector-base voltage | VCBO | -50 | V | open emitter | 4 | ||
| Collector-emitter voltage | VCEO | -50 | V | open base | 4 | ||
| Emitter-base voltage | VEBO | -5 | V | open collector | 4 | ||
| Input voltage | VI | 5 | V | positive | 4 | ||
| Input voltage | VI | -12 | V | negative | 4 | ||
| Output current | IO | -500 | mA | 4 | |||
| Total power dissipation | Ptot | 250 | mW | Tamb ≤ 25 °C | 4 | ||
| Junction temperature | Tj | 150 | °C | 4 | |||
| Ambient temperature | Tamb | -65 | 150 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Thermal resistance from junction to ambient | Rth(j-a) | 500 | K/W | in free air | 4 | ||
| Collector-base cut-off current | ICBO | -100 | nA | VCB = −40 V; IE = 0 A | 5 | ||
| Collector-emitter cut-off current | ICEO | -0.5 | μA | VCE = −50 V; IB = 0 A | 5 | ||
| Emitter-base cut-off current | IEBO | -100 | nA | VEB = −5 V; IC = 0 A | 5 | ||
| DC current gain | hFE | 100 | 250 | - | VCE = −5 V; IC = −50 mA | 5 | |
| Collector-emitter saturation voltage | VCEsat | -0.3 | V | IC = −50 mA; IB = −2.5 mA | 5 | ||
| Bias resistor 1 (input) | R1 | 1.54 | 2.2 | 2.86 | kΩ | 5 |
CAD (KiCad official)
- Symbol:
PDTB123TT - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
pdtb123tt-etched.step/pdtb123tt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pdtb123tt.step/pdtb123tt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (11 pp, sha256
83da0195cf6d28de, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).