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Contents

README

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TP132LC15D4

TECH PUBLIC · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4(1x1)

TP132LC15D4 from TECH PUBLIC, in a DFN-4(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT power_out Regulated output pin (1.5V for this version, 1.2V to 3.6V across the series), with a 1µF ceramic output capacitor in the typical circuit.
2 VSS/GND power_in Ground pin.
3 CE input Chip enable pin, high level 1.5V min to VIN and low level 0.3V max, with standby current of 0.1µA max when CE=VSS.
4 VIN power_in Power input pin, operating range 1.8V to 7.0V and absolute maximum 7V, with a 1µF ceramic input capacitor in the typical circuit.
5 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package DFN-4(1x1)
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: TP132LC15D4
  • Footprint: Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm
  • 3D model: DFN-4(1x1) (KiCad packages3D, STEP)
  • 3D model files: tp132lc15d4-etched.step / tp132lc15d4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tp132lc15d4.step / tp132lc15d4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (9 pp, sha256 9ed060450fc0f710, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF