MAX40056TAUA+ from Maxim Integrated, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RS+	input	External resistor power-side connection input, with a common-mode range of -0.1V to +65V and protection to -5V and +70V.
2	COP	output	Active-low comparator push-pull output, where a low output indicates a fault condition.
3	VDD	power_in	Supply voltage input rated +2.7V to +5.5V, to be bypassed to ground with a 10nF COG/NPO and 1µF X5R capacitor.
4	OUT	output	Current-sense output that has its common-mode point at VREF.
5	REF	bidirectional	Internal 1.5V reference output used with OUT to indicate current direction, bypassed to GND with 10nF and 1µF, and an external reference above 1.5V overrides the internal reference.
6	GND	power_in	Ground that serves as the signal and power return.
7	CIP	input	Comparator input and overcurrent threshold input, which must be kept within 80mV to MIN(VREF-80mV, VDD-1.25V) for proper operation.
8	RS-	input	External resistor load-side connection input, with the same common-mode range as RS+.

Key specifications

Parameter	Value
Manufacturer	Maxim Integrated
Package	MSOP-8
Category	Interface ICs
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
RS+ and RS- to GND		-5		70	V		6
RS+ to RS-		-2		2	V		6
VDD to GND		-0.3		6	V		6
REF, CIP, OUT, COP to GND		-0.3			V	max printed as VDD + 0.3V	6
Continuous current in REF, CIP				5	mA		6
Continuous current in OUT and COP				10	mA		6
Continuous current in RS+ and RS-				10	mA		6
Operating temperature range		-40		125	°C		6
Storage temperature range		-65		150	°C		6
Junction-to-ambient thermal resistance (8 µMAX, four-layer board)	θJA		206		°C/W	Four-layer board, JESD51-7	6
Junction-to-case thermal resistance (8 µMAX)	θJC		42		°C/W		6
Supply voltage	VDD	2.7		5.5	V	Guaranteed by PSRR	6
Supply current	IDD		6	9	mA		6
Power-up time	tPWR_UP			400	µs	Out settle within 1%	6
Input protected CM range	VCM_P	-5		70	V		7
Input common mode range	VCM	-0.3		65	V	-40°C ≤ TA ≤ +85°C	7
Input common mode range	VCM	-0.1		65	V	-40°C ≤ TA ≤ +125°C	7
Input bias current	IRS+, IRS-		3	200	nA	VSENSE = 0V (Note 2)	7
Input bias current	IRS+, IRS-		20	30	µA	VSENSE = 20mV	7
Input leakage current	ILKG		3	200	nA	VDD = 0V, 0V ≤ VRS± ≤ 65V (Note 2)	7
Input offset voltage	VOS		5	20	µV	TA = +25°C	7
Input offset voltage	VOS			300	µV	-40°C ≤ TA ≤ +125°C	7
Input offset drift	TCVOS		0.5		µV/°C		7
Power supply rejection ratio	PSRR	90	110		dB	2.7V ≤ VDD ≤ 5.5V	7
Common mode rejection ratio	CMRR	100	140		dB	-0.3V ≤ VCM ≤ +65V; -40°C ≤ TA ≤ +85°C	7
Common mode rejection ratio	CMRR	120	140		dB	-0.1V ≤ VCM ≤ +65V; -40°C ≤ TA ≤ +125°C	7
Input capacitance	CIN		3		pF	RS+ and RS- input	7
Nominal gain (MAX40056T)	GT		20		V/V	MAX40056T	7
Gain error	GE		0.05	1.5	%	VCM = -0.3V, -40°C ≤ TA ≤ +85°C, -16mV ≤ VSENSE ≤ +16mV	7
Gain error	GE		0.05	0.5	%	VCM = 48V, -40°C ≤ TA ≤ +125°C, -16mV ≤ VSENSE ≤ +16mV	7
Output voltage swing high	VOH		45	100	mV	Sourcing 5mA; VOH = VDD - VOUT	7
Output voltage swing low	VOL		35	70	mV	Sinking 5mA; VOL = VOUT - GND	7
Output short-circuit current	ISC		20		mA	Shorted to either VDD or GND	7
Signal bandwidth	BW-3dB		300		kHz	50% of full-scale range	7
Output slew rate	SR		1.5		V/µs	2VPP output square wave, centered at 1.5V	7
Amplifier small-signal settling time (1%)	tS		2.5		µs	±200mV output step	7
PWM edge recovery settling time	tS_PWM		500		ns	0V to 50V edges: 500V/μs rise/fall times, VSENSE = 0mV (VRS+ = VRS-)	7
AC common mode rejection ratio	AC CMRR		70		dB	100mVAC Sine, f = 100kHz	7
AC power supply rejection ratio	AC PSRR		53		dB	100mVAC Sine, f = 100kHz	8
Voltage noise density	en		150		nV/√Hz	At 10kHz	8
REF output voltage	VREF	1.485	1.5	1.515	V	No load; -40°C ≤ TA ≤ +125°C	8
REF thermal drift	TCVREF		30		ppm/°C		8
REF load regulation	ΔVREF/ΔIREF		30	70	µV/µA	0µA ≤ external load ≤ 500µA	8
REF line regulation	ΔVREF/ΔVDD		0.1	0.5	mV/V	2.7V ≤ VDD ≤ 5.5V	8
REF cap loading			1		µF	No sustained oscillation	8
Internal/external reference switching threshold voltage	VREF_TH	1.65		1.75	V	External reference is enabled by overdriving	8
CIP input resistance	RCIP		10		GΩ	Resistance appears to be to VREF	8
CIP input common mode range	VCIP_IN	0.08			V	Upper limit printed as MIN(VREF - 0.08, VDD - 1.25)	8
Comparator input offset voltage	VOS_CMP		10		mV	80mV ≤ VCIP ≤ min(VREF - 80mV, VDD - 1.25V)	8
Comparator hysteresis	VHYS		40		mV	80mV ≤ VCIP ≤ min(VREF - 80mV, VDD - 1.25V)	8
COP output voltage swing high	VOH_CMP		0.12	0.3	V	Sourcing 2mA; VOH_CMP = VDD - VCOP	8
COP output voltage swing low	VOL_CMP		0.12	0.3	V	Sinking 4mA; VOL_CMP = VCOP - GND	8
Propagation delay low-to-high	tPDL->H		14		µs	200mV overdrive, low-to-high	8
Propagation delay high-to-low	tPDH->L		12		µs	200mV overdrive, high-to-low	8

CAD (KiCad official)

Symbol: MAX40056TAUA+
Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
3D model: MSOP-8 (KiCad packages3D, STEP)
3D model files: max40056taua-etched.step / max40056taua-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max40056taua.step / max40056taua.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Maxim Integrated datasheet (24 pp, sha256 09d5b108edd38fef, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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MAX40056TAUA+

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