component
dsPIC33FJ64MC802-I/SO
Public Made by Adomby adom
Microchip Tech Digital Signal Processors / Controllers (DSPs/DSCs), SOIC-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdowndsPIC33FJ64MC802-I
Microchip Tech · Digital Signal Processors / Controllers (DSPs/DSCs) · SOIC-28-300mil
dsPIC33FJ64MC802-I from Microchip Tech, in a SOIC-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | MCLR | input | Master Clear input; active-low device Reset, also used for programming and debugging. |
| 2 | AN0/VREF+/CN2/RA0 | bidirectional | PORTA I/O RA0 with analog input AN0, external voltage reference (high) input VREF+ and change notification CN2. |
| 3 | AN1/VREF-/CN3/RA1 | bidirectional | PORTA I/O RA1 with analog input AN1, external voltage reference (low) input VREF- and change notification CN3. |
| 4 | PGED1/AN2/C2IN-/RP0/CN4/RB0 | bidirectional | PORTB I/O RB0 with ICSP data channel 1 (PGED1), AN2, comparator 2 negative input, remappable RP0 and CN4. |
| 5 | PGEC1/AN3/C2IN+/RP1/CN5/RB1 | bidirectional | PORTB I/O RB1 with ICSP clock channel 1 (PGEC1), AN3, comparator 2 positive input, remappable RP1 and CN5. |
| 6 | AN4/C1IN-/RP2/CN6/RB2 | bidirectional | PORTB I/O RB2 with AN4, comparator 1 negative input, remappable RP2 and CN6. |
| 7 | AN5/C1IN+/RP3/CN7/RB3 | bidirectional | PORTB I/O RB3 with AN5, comparator 1 positive input, remappable RP3 and CN7. |
| 8 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |
| 9 | OSC1/CLKI/CN30/RA2 | bidirectional | Oscillator crystal input or external clock input CLKI, shared with PORTA RA2 and CN30. |
| 10 | OSC2/CLKO/CN29/PMA0/RA3 | bidirectional | Oscillator crystal output or CLKO, shared with PORTA RA3, CN29 and Parallel Master Port address bit PMA0. |
| 11 | SOSCI/RP4/CN1/PMBE/RB4 | bidirectional | 32.768 kHz secondary oscillator crystal input shared with PORTB RB4, remappable RP4, CN1 and PMP byte enable PMBE. |
| 12 | SOSCO/T1CK/CN0/PMA1/RA4 | bidirectional | 32.768 kHz secondary oscillator crystal output shared with PORTA RA4, Timer1 clock T1CK, CN0 and PMP address PMA1. |
| 13 | VDD | power_in | Positive supply for peripheral logic and I/O pins (3.0V to 3.6V operation); must always be connected. |
| 14 | PGED3/ASDA1/RP5/CN27/PMD7/RB5 | bidirectional | PORTB I/O RB5 with ICSP data channel 3 (PGED3), alternate I2C1 data ASDA1, remappable RP5, CN27 and PMP data PMD7. |
| 15 | PGEC3/ASCL1/RP6/CN24/PMD6/RB6 | bidirectional | PORTB I/O RB6 with ICSP clock channel 3 (PGEC3), alternate I2C1 clock ASCL1, remappable RP6, CN24 and PMP data PMD6. |
| 16 | INT0/RP7/CN23/PMD5/RB7 | bidirectional | PORTB I/O RB7 with external interrupt 0 (INT0), remappable RP7, CN23 and PMP data PMD5. |
| 17 | TCK/PWM2H1/SCL1/RP8/CN22/PMD4/RB8 | bidirectional | PORTB I/O RB8 with JTAG clock TCK, PWM2 high output 1, I2C1 clock SCL1, remappable RP8, CN22 and PMD4. |
| 18 | TDO/PWM2L1/SDA1/RP9/CN21/PMD3/RB9 | bidirectional | PORTB I/O RB9 with JTAG data out TDO, PWM2 low output 1, I2C1 data SDA1, remappable RP9, CN21 and PMD3. |
| 19 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |
| 20 | VCAP | passive | CPU logic filter capacitor connection; needs a low-ESR (<5 ohm) 4.7 uF to 10 uF capacitor to ground and must not be connected to VDD. |
| 21 | PGED2/TDI/PWM1H3/RP10/CN16/PMD2/RB10 | bidirectional | PORTB I/O RB10 with ICSP data channel 2 (PGED2), JTAG TDI, PWM1 high output 3, remappable RP10, CN16 and PMD2. |
| 22 | PGEC2/TMS/PWM1L3/RP11/CN15/PMD1/RB11 | bidirectional | PORTB I/O RB11 with ICSP clock channel 2 (PGEC2), JTAG TMS, PWM1 low output 3, remappable RP11, CN15 and PMD1. |
| 23 | PWM1H2/RP12/CN14/PMD0/RB12 | bidirectional | PORTB I/O RB12 with PWM1 high output 2, remappable RP12, CN14 and PMP data PMD0. |
| 24 | PWM1L2/RP13/CN13/PMRD/RB13 | bidirectional | PORTB I/O RB13 with PWM1 low output 2, remappable RP13, CN13 and PMP read strobe PMRD. |
| 25 | PWM1H1/RTCC/RP14/CN12/PMWR/RB14 | bidirectional | PORTB I/O RB14 with PWM1 high output 1, RTCC alarm output, remappable RP14, CN12 and PMP write strobe PMWR. |
| 26 | PWM1L1/RP15/CN11/PMCS1/RB15 | bidirectional | PORTB I/O RB15 with PWM1 low output 1, remappable RP15, CN11 and PMP chip select PMCS1. |
| 27 | AVSS | power_in | Ground reference for analog modules; must be connected regardless of ADC use. |
| 28 | AVDD | power_in | Positive supply for analog modules; must be connected at all times. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOIC-28-300mil |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 3 | 3.6 | V | Industrial and Extended | 359 | |
| RAM Data Retention Voltage | VDR | 1.8 | V | 359 | |||
| Operating temperature (Industrial) | TA | -40 | 85 | °C | Industrial | 359 | |
| VDD Rise Rate (POR) | SVDD | 0.03 | V/ms | 0-3.0V in 0.1s | 359 |
CAD (KiCad official)
- Symbol:
dsPIC33FJ64MC802-I - Footprint:
Package_SO:SOIC-28W_7.5x17.9mm_P1.27mm - 3D model: SOIC-28-300mil (KiCad packages3D, STEP)
- 3D model files:
dspic33fj64mc802-i-so-etched.step/dspic33fj64mc802-i-so-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);dspic33fj64mc802-i-so.step/dspic33fj64mc802-i-so.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (460 pp, sha256
28337a1943388de8, retrieved 2026-11-13, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).