component

CD74HC73E

Public Made by Adom

by adom

lingxingic Flip Flops, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

markdown

CD74HC73E

lingxingic · Flip Flops · DIP-14

CD74HC73E from lingxingic, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1CP input Clock input for flip-flop 1, triggered on the HIGH-to-LOW edge.
2 1R input Asynchronous reset input for flip-flop 1, active LOW; a LOW forces 1Q LOW and 1Q̅ HIGH regardless of clock.
3 1K input Synchronous K input for flip-flop 1, sampled at the HIGH-to-LOW clock transition.
4 VCC power_in Supply voltage: 2.0 V to 6.0 V for CD74HC73, 4.5 V to 5.5 V for CD74HCT73.
5 2CP input Clock input for flip-flop 2, triggered on the HIGH-to-LOW edge.
6 2R input Asynchronous reset input for flip-flop 2, active LOW; a LOW forces 2Q LOW and 2Q̅ HIGH regardless of clock.
7 2J input Synchronous J input for flip-flop 2, sampled at the HIGH-to-LOW clock transition.
8 2Q̅ output Complement output of flip-flop 2.
9 2Q output True output of flip-flop 2.
10 2K input Synchronous K input for flip-flop 2, sampled at the HIGH-to-LOW clock transition.
11 GND power_in Ground (0 V) reference for all voltages.
12 1Q output True output of flip-flop 1.
13 1Q̅ output Complement output of flip-flop 1.
14 1J input Synchronous J input for flip-flop 1, sampled at the HIGH-to-LOW clock transition.

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V Referenced to GND 6
Supply current ICC 50 mA - 6
Ground current IGND -50 mA - 6
Input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 6
Output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 6
Output current IO -25 25 mA -0.5V < VO < VCC+0.5V 6
Storage temperature Tstg -65 150 ℃ - 6
Soldering temperature TL 245 ℃ 10s, DIP package 6
Supply voltage (HC) VCC 2 5 6 V CD74HC73 (2V to 6V) 6
Input voltage VI 0 V CD74HC73; max printed as VCC 6
Output voltage VO 0 V CD74HC73; max printed as VCC 6
Ambient temperature Tamb -40 125 ℃ CD74HC73 6
HIGH-level input voltage VIH 1.5 1.2 V Tamb -40~85℃; VCC 2.0V 7
HIGH-level input voltage VIH 3.15 2.4 V Tamb -40~85℃; VCC 4.5V 7
HIGH-level input voltage VIH 4.2 3.2 V Tamb -40~85℃; VCC 6.0V 7
LOW-level input voltage VIL 0.8 0.5 V Tamb -40~85℃; VCC 2.0V 7
LOW-level input voltage VIL 2.1 1.35 V Tamb -40~85℃; VCC 4.5V 7
LOW-level input voltage VIL 2.8 1.8 V Tamb -40~85℃; VCC 6.0V 7
HIGH-level output voltage VOH 1.9 2 V Tamb -40~85℃; VCC 2.0V; IO=-20uA 7
HIGH-level output voltage VOH 4.4 4.5 V Tamb -40~85℃; VCC 4.5V; IO=-20uA 7
HIGH-level output voltage VOH 5.9 6 V Tamb -40~85℃; VCC 6.0V; IO=-20uA 7
HIGH-level output voltage VOH 3.84 4.32 V Tamb -40~85℃; VCC 4.5V; IO=-4.0mA 7
HIGH-level output voltage VOH 5.34 5.81 V Tamb -40~85℃; VCC 6.0V; IO=-5.2mA 7
LOW-level output voltage VOL 0 0.1 V Tamb -40~85℃; VCC 2.0V; IO=20uA 7
LOW-level output voltage VOL 0 0.1 V Tamb -40~85℃; VCC 4.5V; IO=20uA 7
LOW-level output voltage VOL 0 0.1 V Tamb -40~85℃; VCC 6.0V; IO=20uA 7
LOW-level output voltage VOL 0.15 0.33 V Tamb -40~85℃; VCC 4.5V; IO=4.0mA 7
LOW-level output voltage VOL 0.16 0.33 V Tamb -40~85℃; VCC 6.0V; IO=5.2mA 7
Input leakage current II -1 1 uA Tamb -40~85℃; VCC 6.0V; VI=VCC or GND 7
Supply current ICC 80 uA Tamb -40~85℃; VCC 6.0V; VI=VCC or GND; IO=0A 7
HIGH-level input voltage VIH 1.5 V Tamb -40~125℃; VCC 2.0V 8
HIGH-level input voltage VIH 3.15 V Tamb -40~125℃; VCC 4.5V 8
HIGH-level input voltage VIH 4.2 V Tamb -40~125℃; VCC 6.0V 8
LOW-level input voltage VIL 0.5 V Tamb -40~125℃; VCC 2.0V 8
LOW-level input voltage VIL 1.35 V Tamb -40~125℃; VCC 4.5V 8
LOW-level input voltage VIL 1.8 V Tamb -40~125℃; VCC 6.0V 8
HIGH-level output voltage VOH 1.9 V Tamb -40~125℃; VCC 2.0V; IO=-20uA 8
HIGH-level output voltage VOH 4.4 V Tamb -40~125℃; VCC 4.5V; IO=-20uA 8
HIGH-level output voltage VOH 5.9 V Tamb -40~125℃; VCC 6.0V; IO=-20uA 8
HIGH-level output voltage VOH 3.7 V Tamb -40~125℃; VCC 4.5V; IO=-4.0mA 8
HIGH-level output voltage VOH 5.2 V Tamb -40~125℃; VCC 6.0V; IO=-5.2mA 8
LOW-level output voltage VOL 0.1 V Tamb -40~125℃; VCC 2.0V; IO=20uA 8
LOW-level output voltage VOL 0.1 V Tamb -40~125℃; VCC 4.5V; IO=20uA 8
LOW-level output voltage VOL 0.1 V Tamb -40~125℃; VCC 6.0V; IO=20uA 8
LOW-level output voltage VOL 0.4 V Tamb -40~125℃; VCC 4.5V; IO=4.0mA 8
LOW-level output voltage VOL 0.4 V Tamb -40~125℃; VCC 6.0V; IO=5.2mA 8
Input leakage current II -1 1 uA Tamb -40~125℃; VCC 6.0V; VI=VCC or GND 8
Supply current ICC 160 uA Tamb -40~125℃; VCC 6.0V; VI=VCC or GND; IO=0A 8
nCP to nQ propagation delay tPLH, tPHL 52 160 ns Tamb -40~85℃; VCC 2.0V; CL=50pF 9
nCP to nQ propagation delay tPLH, tPHL 19 32 ns Tamb -40~85℃; VCC 4.5V; CL=50pF 9
nCP to nQ propagation delay tPLH, tPHL 15 27 ns Tamb -40~85℃; VCC 6.0V; CL=50pF 9
Maximum clock frequency fmax 4.8 30 MHz Tamb -40~85℃; VCC 2.0V; CL=50pF 9
Maximum clock frequency fmax 24 91 MHz Tamb -40~85℃; VCC 4.5V; CL=50pF 9
Maximum clock frequency fmax 28 108 MHz Tamb -40~85℃; VCC 6.0V; CL=50pF 9
nCP pulse width HIGH or LOW tw 20 8 ns Tamb -40~85℃; VCC 4.5V; CL=50pF 9
nJ,nK to nCP set-up time tsu 25 8 ns Tamb -40~85℃; VCC 4.5V; CL=50pF 9
nCP to nQ propagation delay tPLH, tPHL 240 ns Tamb -40~125℃; VCC 2.0V; CL=50pF 10
nCP to nQ propagation delay tPLH, tPHL 48 ns Tamb -40~125℃; VCC 4.5V; CL=50pF 10
nCP to nQ propagation delay tPLH, tPHL 41 ns Tamb -40~125℃; VCC 6.0V; CL=50pF 10
Maximum clock frequency fmax 20 MHz Tamb -40~125℃; VCC 4.5V; CL=50pF 11

CAD (KiCad official)

  • Symbol: CD74HC73E
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: cd74hc73e-etched.step / cd74hc73e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cd74hc73e.step / cd74hc73e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (17 pp, sha256 3d404d6b159fde46, retrieved 2026-10-13, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF