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Contents

README

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STP9N65M2

STMicroelectronics · MOSFETs · TO-220

STP9N65M2 from STMicroelectronics, in a TO-220. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate. Insulated MOS control terminal; VGS(th) = 2-4 V,
2 D passive Drain. Also electrically bonded to the metal TAB of the TO-220 package. Drain-source breakdown V(BR)DSS = 650 V min; continuous ID = 5 A at TC = 25 °C, pulsed IDM = 20 A; RDS(on) ≤ 0.90 Ω at VGS = 10 V, ID = 2.5 A.
3 S passive Source. Reference terminal for VGS and the anode of the intrinsic body diode (VSD ≈ 1.6 V at ISD = 5 A, VGS = 0). Body-diode reverse-recovery trr ≈ 276 ns at 25 °C.
TAB D passive Metal mounting TAB, internally shorted to the Drain (pin 2). Provides the primary thermal path (Rthj-case = 2.08 °C/W for TO-220). Insulation withstand voltage 2.5 kV RMS from leads to external heat sink.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package TO-220
Category Transistors/Thyristors
Pins 4

Ordering variants

Same part, different packaging or reel option.

  • STP9N65M2
  • STP9N65M2STD9N65M2
  • STP9N65M2STF9N65M2
  • STP9N65M2STU9N65M2

CAD (KiCad official)

  • Symbol: STP9N65M2
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220 (KiCad packages3D, STEP)
  • 3D model files: stp9n65m2-etched.step / stp9n65m2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stp9n65m2.step / stp9n65m2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (None pp, sha256 a66a6196d685cbf0, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF