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ATSAMD21E17A-MUT
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Microchip Tech Pre-ordered MCUs, QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownATSAMD21E17A-MUT
Microchip Tech · Pre-ordered MCUs · QFN-32-EP(5x5)
ATSAMD21E17A-MUT from Microchip Tech, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA00 | bidirectional | PORT group A general-purpose I/O in the VDDANA domain, also multiplexed to the 32 kHz crystal input XIN32, EXTINT[0], SERCOM1/PAD[0] and TCC2/WO[0]. |
| 2 | PA01 | bidirectional | PORT group A general-purpose I/O in the VDDANA domain, also multiplexed to the 32 kHz crystal output XOUT32, EXTINT[1], SERCOM1/PAD[1] and TCC2/WO[1]. |
| 3 | PA02 | bidirectional | PORT group A general-purpose I/O in the VDDANA domain, also usable as analog input AIN[0] and DAC output VOUT, with EXTINT[2] and TCC3/WO[0]. |
| 4 | PA03 | bidirectional | PORT group A general-purpose I/O in the VDDANA domain, also usable as analog input AIN[1] and ADC/DAC voltage reference VREFA, with EXTINT[3] and TCC3/WO[1]. |
| 5 | PA04 | bidirectional | PORT group A general-purpose I/O in the VDDANA domain, also usable as analog input AIN[4] and AIN[0] and ADC reference VREFB, with EXTINT[4], SERCOM0/PAD[0] and TCC0/WO[0]. |
| 6 | PA05 | bidirectional | PORT group A general-purpose I/O in the VDDANA domain, also usable as analog input AIN[5] and AIN[1], with EXTINT[5], SERCOM0/PAD[1] and TCC0/WO[1]. |
| 7 | PA06 | bidirectional | PORT group A general-purpose I/O in the VDDANA domain, also usable as analog input AIN[6] and AIN[2], with EXTINT[6], SERCOM0/PAD[2] and TCC1/WO[0]. |
| 8 | PA07 | bidirectional | PORT group A general-purpose I/O in the VDDANA domain, also usable as analog input AIN[7] and AIN[3], with EXTINT[7], SERCOM0/PAD[3] and TCC1/WO[1]. |
| 9 | VDDANA | power_in | Analog supply pin for the analog peripherals, referenced to GND at pin 10. |
| 10 | GND | power_in | Ground pin for the digital and I/O domain. |
| 11 | PA08 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to NMI, AIN[16], SERCOM0/PAD[0], SERCOM2/PAD[0] and TCC0/WO[0]. |
| 12 | PA09 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[9], AIN[17], SERCOM0/PAD[1], SERCOM2/PAD[1] and TCC0/WO[1]. |
| 13 | PA10 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[10], AIN[18], SERCOM0/PAD[2], SERCOM2/PAD[2] and TCC1/WO[0]. |
| 14 | PA11 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[11], AIN[19], SERCOM0/PAD[3], SERCOM2/PAD[3] and TCC1/WO[1]. |
| 15 | PA14 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to the crystal input XIN for XOSC, EXTINT[14], SERCOM2/PAD[2] and TC3/WO[0]. |
| 16 | PA15 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to the crystal output XOUT for XOSC, EXTINT[15], SERCOM2/PAD[3] and TC3/WO[1]. |
| 17 | PA16 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[0], X[4], SERCOM1/PAD[0], SERCOM3/PAD[0] and TCC2/WO[0]. |
| 18 | PA17 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[1], X[5], SERCOM1/PAD[1], SERCOM3/PAD[1] and TCC2/WO[1]. |
| 19 | PA18 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[2], X[6], SERCOM1/PAD[2], SERCOM3/PAD[2], TC3/WO[0] and AC/CMP[0]. |
| 20 | PA19 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[3], X[7], SERCOM1/PAD[3], SERCOM3/PAD[3], TC3/WO[1] and AC/CMP[1]. |
| 21 | PA22 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[6], X[10], SERCOM3/PAD[0], SERCOM5/PAD[0], TC4/WO[0] and TCC0/WO[4]. |
| 22 | PA23 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[7], X[11], SERCOM3/PAD[1], SERCOM5/PAD[1], TC4/WO[1] and USB/SOF 1kHz. |
| 23 | PA24 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC5/WO[0] and USB DM; no drive-strength option is available on this pin. |
| 24 | PA25 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC5/WO[1] and USB DP; no drive-strength option is available on this pin. |
| 25 | PA27 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[15], TCC3/WO[6] and GCLK_IO[0]. |
| 26 | RESET | input | External active-low reset input pin of the device. |
| 27 | PA28 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to EXTINT[8], TCC3/WO[7] and GCLK_IO[0]. |
| 28 | GND | power_in | Ground pin for the digital core and I/O domain. |
| 29 | VDDCORE | power_out | Regulated output of the internal voltage regulator that supplies the core logic. |
| 30 | VDDIN | power_in | Input supply pin for the internal voltage regulator and I/O domain. |
| 31 | PA30 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to the SWD clock SWCLK, EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0] and TCC3/WO[4]. |
| 32 | PA31 | bidirectional | PORT group A general-purpose I/O in the VDDIO domain, also multiplexed to the SWD data pin SWDIO (active only with a debugger present), EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1] and TCC3/WO[5]. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | QFN-32-EP(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating voltage (VDDIO, VDDIN, VDDANA common supply) | VDD | 1.62 | 3.63 | V | SAM D21 variant; same voltage applied to VDDIN, VDDIO and VDDANA | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | tin | including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. | 859 |
CAD (KiCad official)
- Symbol:
ATSAMD21E17A-MUT - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
atsamd21e17a-mut-etched.step/atsamd21e17a-mut-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);atsamd21e17a-mut.step/atsamd21e17a-mut.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (1148 pp, sha256
18ca1ccab5aa330f, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).