component
AP7583AQ-MP-13
Public Made by Adomby adom
Diodes Incorporated Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdownAP7583AQ-MP-13
Diodes Incorporated · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-8-EP
AP7583AQ-MP-13 from Diodes Incorporated, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input voltage with a recommended supply range of 3.0V to 42V and an absolute maximum rating of -0.3V to 45V; a 10µF ceramic capacitor is recommended between IN and GND. |
| 2 | EN | input | Active-high enable input with VIL of 0V to 0.3V and VIH of 1.7V to VIN; tying it to VIN keeps the output on at all times. |
| 3 | NC | unconnected | Not connected internally; the datasheet recommends connecting it to GND to maximize PCB copper for thermal dissipation. |
| 4 | GND | power_in | Ground reference for the regulator; both GND pins (4 and 5) should be connected together on the PCB. |
| 5 | GND | power_in | Ground reference for the regulator; both GND pins (4 and 5) should be connected together on the PCB. |
| 6 | FB | input | Adjustable-version feedback pin where a resistor divider from FB to VOUT and GND sets the output, with VFB between 1.183V and 1.231V (typ 1.207V) and FB leakage between -10nA and 20nA. |
| 7 | PG | output | Open-drain power-good output with one internal pull-up resistor that is driven low when VOUT falls below the PG threshold and goes high-impedance above it, with a sinking voltage of at most 0.4V at 5mA. |
| 8 | VOUT | power_out | Regulated output voltage with an absolute maximum rating of -0.3V to 7V and an adjustable output range of 1.2V to 5.0V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Diodes Incorporated |
| Package | MSOP-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage Variation from Specified VOUT | VOUT | 98.5 | 101.5 | % of VOUT | 5 | ||
| Input Voltage | VIN | 3 | 42 | V | 5 | ||
| Feedback Reference Voltage | VFB | 1.183 | 1.207 | 1.231 | V | 5 | |
| Current Limit | ILIMIT | 310 | 510 | 690 | mA | VOUT short to 90% x VOUT | 5 |
| Line Regulation | ΔVOUT/ΔVIN | -10 | 10 | mV | VIN = VOUT + 1V to 40V, IOUT = 1mA | 5 | |
| Load Regulation | ΔVOUT/VOUT | -20 | 20 | mV | 1mA ≤ IOUT ≤ 300mA | 5 | |
| Dropout Voltage at VOUT = 3.3V | VDROP | 450 | 700 | mV | IOUT = 300mA @VOUT = 3.3V | 5 | |
| Dropout Voltage at VOUT = 5V | VDROP | 320 | 500 | mV | IOUT = 300mA @VOUT = 5V | 5 | |
| Quiescent Current (AP7583AQ) | IQ | 3 | 6 | µA | IOUT = 0 | 5 | |
| Shutdown Current | ISHUTDOWN | 0.3 | 0.5 | µA | EN = 0 | 5 | |
| EN Input Logic-Low Voltage | VIL | 0 | 0.3 | V | 5 | ||
| EN Input Logic-High Voltage | VIH | 1.7 | V | 5 | |||
| Output Voltage Temperature Coefficient | ΔVOUT/(VOUT×ΔT) | -100 | 100 | ppm/°C | IOUT = 100µA, -40°C ≤ TJ ≤ +125°C | 5 | |
| UVLO VIN Undervoltage Detection (ramp VIN up) | UVLO | 2.1 | 2.4 | 2.7 | V | Ramp VIN up until the output turns on | 5 |
| FB Leakage Current (Adjustable Version) | IFB | -10 | 20 | nA | FB = 0 | 5 | |
| PG Rising Threshold | VPGR | 90 | 94 | % | VFB rising | 5 | |
| PG Falling Threshold | VPGF | 88 | 92 | % | VFB falling | 5 | |
| PG Sinking Voltage | VPGS | 0.4 | V | Sinking current = 5mA | 5 | ||
| Input Supply Voltage (absolute maximum) | VIN | -0.3 | 45 | V | 4 | ||
| Regulated Output Voltage (absolute maximum) | VOUT | -0.3 | 7 | V | 4 | ||
| Output Current | IOUT | 300 | mA | 4 | |||
| Lead Temperature (Soldering, 10 sec) | TLEAD | 260 | ºC | Soldering, 10 sec | 4 | ||
| Operating Junction Temperature (absolute maximum) | TJ | 150 | ºC | 4 | |||
| Storage Temperature Range | TSTG | -40 | 150 | °C | 4 | ||
| CDM ESD (Charged Device Model) | CDM | -1500 | 1500 | V | 4 | ||
| HBM ESD (Human Body Model) | HBM | -2000 | 2000 | V | 4 | ||
| Supply Input Voltage (recommended) | VIN | 3 | 42 | V | 4 | ||
| Supply Output Voltage (recommended) | VOUT | 1.2 | 5 | V | 4 | ||
| Operating Junction Temperature (recommended) | TJ | -40 | 125 | °C | 4 | ||
| Thermal Shutdown Temperature | TOTSD | 175 | °C | 5 | |||
| Thermal Shutdown Hysteresis | THYOTSD | 20 | °C | 5 | |||
| Power-Supply Rejection Ratio | PSRR | 70 | dB | V(Ripple) = 0.5VPP, IOUT = 10mA, frequency = 100Hz, COUT = 2.2µF | 5 | ||
| UVLO Hysteresis | UVLO | 0.2 | V | 5 | |||
| Output Voltage Turn-On Delay Time | tD | 0.8 | ms | VEN high to VOUT rising 10% | 5 | ||
| Output Voltage Ramp Up Time | tSS | 200 | µs | VOUT rising 10% to 90% | 5 | ||
| PG React Time | tPG | 30 | µs | VOUT 90% to PG active | 5 | ||
| PG Off Deglitch Time | tPGF | 3 | µs | VFB falling to PG low | 5 | ||
| Thermal Resistance Junction to Ambient (MSOP-8EP) | θJA | 36.1 | °C/W | JEDEC STD.51 High-K board | 4 | ||
| Thermal Resistance Junction to Case (MSOP-8EP) | θJC | 6.532 | °C/W | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | Abs | HBM ESD (Human Body Model) ±2000 V Notes: 4. a). Stresses beyond those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only and | 4 | |
| contacts | copper | reduce noise. For PCB layout, a wide copper trace is required for both IN and GND pins. A lower ESR capacitor type allows the use of less | 12 |
CAD (KiCad official)
- Symbol:
AP7583AQ-MP-13 - Footprint:
Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm - 3D model: MSOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
ap7583aq-mp-13-etched.step/ap7583aq-mp-13-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ap7583aq-mp-13.step/ap7583aq-mp-13.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Diodes Incorporated datasheet (21 pp, sha256
236be72831d65721, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).