component
DS8242-50A3
Public Made by Adomby adom
DSTECH Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Contents
README
markdownDS8242-50A3
DSTECH · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3
DS8242-50A3 from DSTECH, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Input of the supply voltage, with a recommended input range of 2.0V to 24V and an absolute maximum VIN to GND of -0.3V to 30V; place a 1µF or larger input capacitor close to the VIN and GND pins. |
| 2 | GND | power_in | Ground reference pin for the regulator, to which the input and output capacitor grounds must be returned using a wide, short copper trace. |
| 3 | VOUT | power_out | Regulated output of the LDO, which is 5.0V for the DS8242-50 with 500mA output current capability; place an output capacitor between 1µF and 22µF with a minimum 1mΩ ESR close to the VOUT and GND pins, and note the absolute maximum VOUT to GND of -0.3V to 6.0V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | DSTECH |
| Package | SOT-89-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VIN | 2 | 24 | V | 5 | ||
| DC Output Voltage Accuracy | -1 | 1 | % | ILOAD =0.1mA | 5 | ||
| Output Current Limit | ILIM | 501 | 700 | mA | VOUT =0 | 5 | |
| VIN to GND | VIN | -0.3 | 30 | V | 4 | ||
| VOUT to GND | VOUT | -0.3 | 6 | V | 4 | ||
| VOUT to VIN | VOUT-VIN | -28 | 0.3 | V | 4 | ||
| Lead Temperature (Soldering, 10 sec.) | 260 | °C | 10 sec soldering | 4 | |||
| Junction Temperature | TJ | 150 | °C | 4 | |||
| Storage Temperature Range | TSTG | -40 | 150 | °C | 4 | ||
| ESD Susceptibility HBM | 2 | KV | HBM | 4 | |||
| ESD Susceptibility MM | 200 | V | MM | 4 | |||
| Input Voltage | VIN | 2 | 24 | V | 4 | ||
| Junction Temperature Range | TJ | -40 | 125 | °C | 4 | ||
| Ambient Temperature Range | TA | -40 | 85 | °C | 4 | ||
| Dropout Voltage (VOUT ≥ 5V) | VDROP | 0.35 | V | ILOAD =100mA; VOUT ≥ 5V | 5 | ||
| Ground Current | IQ | 1.5 | μA | ILOAD = 0mA | 5 | ||
| Line Regulation | ΔLINE | 0.5 | % | ILOAD =1mA, 10V ≤ VIN ≤ 20V | 5 | ||
| Load Regulation | ΔLOAD | 0.3 | % | 10mA≤ ILOAD ≤ 0.2A | 5 | ||
| Power Supply Rejection Ratio | PSRR | 70 | dB | VOUT =5V, ILOAD =30mA, VIN = 12V, f = 1KHz | 5 | ||
| Thermal Shutdown Temperature | TSD | 160 | °C | ILOAD =10mA | 5 | ||
| Thermal Shutdown Hysteresis | ΔTSD | 15 | °C | 5 | |||
| Thermal Resistance Junction-to-Ambient, SOT-89-3 | θJA | 120 | °C/W | TA=25°C on DSTECH EVB board (Note 2) | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | must be back to the DS8242 ground pin using as wide and as short of a copper trace as is practical. | 8 |
CAD (KiCad official)
- Symbol:
DS8242-50A3 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
ds8242-50a3-etched.step/ds8242-50a3-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ds8242-50a3.step/ds8242-50a3.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: DSTECH datasheet (12 pp, sha256
02f10bfeea1c3ede, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).