TC4426EOA713 from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NC	unconnected	No connection; the datasheet lists this pin as not connected to any internal circuit.
2	IN A	input	High-impedance TTL/CMOS-compatible input for inverting driver A with 300 mV hysteresis between the high and low thresholds to prevent output glitches on slow input edges, and unused driver inputs must be grounded.
3	GND	power_in	Ground return pin that should be connected through a low-impedance path to the return bias supply, and which carries high peak current when a capacitive load discharges.
4	IN B	input	High-impedance TTL/CMOS-compatible input for driver B with 300 mV hysteresis between the high and low thresholds to prevent output glitches on slow input edges, and unused driver inputs must be grounded.
5	OUT B	output	Low-impedance CMOS push-pull output for driver B with equal pull-up and pull-down strength so that rise and fall times are matched.
6	VDD	power_in	Bias supply input rated 4.5 V to 18 V relative to GND, which should be bypassed with a ceramic capacitor placed close to the pin (1.0 µF recommended).
7	OUT A	output	Low-impedance CMOS push-pull output for driver A with equal pull-up and pull-down strength so that rise and fall times are matched.
8	NC	unconnected	No connection; the datasheet lists this pin as not connected to any internal circuit.

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	SOIC-8
Category	Power Management ICs
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input current	IIN	-10		10	µA	0V ≤ VIN ≤ VDD	4
Logic 0 low input voltage	VIL			0.8	V		4
Logic 1 high input voltage	VIH	2.4			V		4
Low output voltage	VOL			0.025	V	DC 测试	4
Output resistance	RO		9	12	Ω	IOUT = 10 mA, VDD = 18V	4
Latch-up protection withstand reverse current	IREV	0.5			A	Duty cycle ≤ 2%, t ≤ 300 µs; VDD = 18V	4
Rise time	tR			40	ns	Figure 4-1	4
Fall time	tF			40	ns	Figure 4-1	4
Delay time (tD1)	tD1			40	ns	Figure 4-1	4
Delay time (tD2)	tD2			60	ns	Figure 4-1	4
Power supply current	IS			8	mA	VIN = 3V (both inputs)	4
Power supply current	IS			0.6	mA	VIN = 0V (both inputs)	4
Specified temperature range (E)	TA	-40		85	°C		4
Supply voltage	VDD	4.5		18	V		9
Power supply voltage				22	V		3
Maximum junction temperature	TJ			150	°C		4
Storage temperature range	TA	-65		150	°C		4
Thermal resistance, 8-pin SOIC	θJA		155		°C/W		4

CAD (KiCad official)

Symbol: TC4426EOA713
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: tc4426eoa713-etched.step / tc4426eoa713-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tc4426eoa713.step / tc4426eoa713.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (20 pp, sha256 861f6ead8872b633, retrieved 2026-11-05, tier: manufacturer)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

TC4426EOA713

Verified TC4426EOA713

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README