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Contents

README

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SIR432DP-T1-GE3-VB

VBsemi Elec · MOSFETs · DFN5x6-8

SIR432DP-T1-GE3-VB from VBsemi Elec, in a DFN5x6-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the N-channel MOSFET (pin 1 marked with a dot on the top view).
2 S passive Source terminal of the N-channel MOSFET.
3 S passive Source terminal of the N-channel MOSFET.
4 G input Gate terminal; gate-source voltage limited to ±20 V.
5 D passive Drain terminal; drain-source voltage rated 100 V.
6 D passive Drain terminal; drain-source voltage rated 100 V.
7 D passive Drain terminal; drain-source voltage rated 100 V.
8 D passive Drain terminal; drain-source voltage rated 100 V.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer VBsemi Elec
Package DFN5x6-8
Category Transistors/Thyristors
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source voltage VDS 100 V 1
Gate-source voltage VGS -20 20 V 1
Continuous drain current ID 30 A TC = 25 °C (TJ = 150 °C) 1
Continuous drain current ID 19 A TC = 70 °C (TJ = 150 °C) 1
Continuous drain current ID 10 A TA = 25 °C, notes b, c 1
Continuous drain current ID 8.5 A TA = 70 °C, notes b, c 1
Pulsed drain current IDM 75 A t = 100 μs 1
Continuous source-drain diode current IS 56 A TC = 25 °C 1
Continuous source-drain diode current IS 4.5 A TA = 25 °C, notes b, c 1
Single pulse avalanche current IAS 20 A L = 0.1 mH 1
Single pulse avalanche energy EAS 20 mJ 1
Maximum power dissipation PD 60 W TC = 25 °C 1
Maximum power dissipation PD 40 W TC = 70 °C 1
Maximum power dissipation PD 5 W TA = 25 °C, notes b, c 1
Maximum power dissipation PD 3.2 W TA = 70 °C, notes b, c 1
Operating junction and storage temperature range TJ, Tstg -55 150 °C 1
Soldering recommendations (peak temperature) 260 °C note c 1
Maximum junction-to-ambient RthJA 20 25 °C/W t ≤ 10 s, note b 1
Drain-source breakdown voltage V(BR)DSS 100 V VGS = 0 V, ID = 250 μA 2
Gate-source threshold voltage VGS(th) 3 5 V VDS = VGS, ID = 250 μA 2
On-state drain current ID(on) 40 A VDS 10 V, VGS = 10 V 2
Gate-source leakage IGSS 100 nA VDS = 0 V, VGS = ±20 V 2
Zero gate voltage drain current IDSS 1 μA VDS = 100 V, VGS = 0 V 2
Zero gate voltage drain current IDSS 15 μA VDS = 100 V, VGS = 0 V, TJ = 70 °C 2
Gate resistance Rg 0.2 0.76 1.4 f = 1 MHz 2
Turn-on delay time td(on) 24 ns VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 2
Rise time tr 5 10 ns VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 2
Turn-off delay time td(off) 19 38 ns VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 2
Fall time tf 5 10 ns VDD = 50 V, RL = 5, ID 10 A, VGEN = 10 V, Rg = 1 2
Turn-on delay time td(on) 30 ns VDD = 50 V, RL = 5, ID 10 A, VGEN = 7.5 V, Rg = 1 2
Rise time tr 6 12 ns VDD = 50 V, RL = 5, ID 10 A, VGEN = 7.5 V, Rg = 1 2
Continuous source-drain diode current IS 56.8 A TC = 25 °C 2
Pulse diode forward current ISM 80 A 2
Body diode voltage VSD 0.78 1.1 V IS = 5 A, VGS = 0 V 2
Body diode reverse recovery time trr 86 ns IF = 10 A, di/dt = 100 A/μs, TJ = 25 °C 2
Body diode reverse recovery charge Qrr 72 144 nC 2

CAD (KiCad official)

  • Symbol: SIR432DP-T1-GE3-VB
  • Footprint: Package_DFN_QFN:DFN-S-8-1EP_6x5mm_P1.27mm
  • 3D model: DFN5x6-8 (KiCad packages3D, STEP)
  • 3D model files: sir432dp-t1-ge3-vb-etched.step / sir432dp-t1-ge3-vb-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sir432dp-t1-ge3-vb.step / sir432dp-t1-ge3-vb.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: VBsemi Elec datasheet (8 pp, sha256 b95f11d800a947f4, retrieved 2026-10-28, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF