component
MSPM0L1306TRHBR
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Texas Instruments Microcontrollers (MCU/MPU/SOC), VQFN-32(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSPM0L1306TRHBR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · VQFN-32(5x5)
MSPM0L1306TRHBR from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PA0 | bidirectional | Universal digital I/O with shutdown wakeup capability supporting UART1_TX, I2C0_SDA (default BSL), TIMG1_C0, SPI0_CS1 functions |
| 2 | PA1 | bidirectional | Universal digital I/O with shutdown wakeup capability supporting UART1_RX, I2C0_SCL (default BSL), TIMG1_C1 functions |
| 3 | NRST | input | Active-low reset input pin, must be pulled high to VDD via 47kΩ resistor for device startup |
| 4 | VDD | power_in | Power supply positive input, 1.62V to 3.6V with 10µF and 0.1µF decoupling capacitors required |
| 5 | VSS | power_in | Ground/power supply negative reference |
| 6 | PA2/ROSC | bidirectional | Universal digital I/O with external resistor function for SYSOSC frequency correction, supports TIMG1_C1 [2], SPI0_CS0 [3] |
| 7 | PA3 | bidirectional | Universal digital I/O supporting TIMG2_C0 [2], SPI0_CS1 [3], UART1_CTS [4], COMP0_OUT [5] |
| 8 | PA4 | bidirectional | Universal digital I/O supporting TIMG2_C1 [2], SPI0_POCI [3], UART1_RTS [4] |
| 9 | PA5 | bidirectional | High-speed universal digital I/O supporting TIMG0_C0 [2], SPI0_PICO [3], FCC_IN [4] |
| 10 | PA6 | bidirectional | Universal digital I/O supporting TIMG0_C1 [2], SPI0_SCK [3] |
| 11 | PA7 | bidirectional | Universal digital I/O supporting COMP0_OUT [2], CLK_OUT [3], TIMG1_C0 [4] |
| 12 | PA8 | bidirectional | Universal digital I/O supporting UART0_TX [2], SPI0_CS0 [3], UART1_RTS [4], TIMG2_C0 [5] |
| 13 | PA9 | bidirectional | Universal digital I/O supporting UART0_RX [2], SPI0_PICO [3], UART1_CTS [4], TIMG2_C1 [5], CLK_OUT [6] |
| 14 | PA10 | bidirectional | High-speed universal digital I/O supporting UART1_TX [2], SPI0_POCI [3], I2C0_SDA [4], TIMG4_C0 [5], CLK_OUT [6] |
| 15 | PA11 | bidirectional | Universal digital I/O supporting UART1_RX [2], SPI0_SCK [3], I2C0_SCL [4], TIMG4_C1 [5], COMP0_OUT [6] |
| 16 | PA12 | bidirectional | Universal digital I/O supporting UART0_CTS [2], TIMG0_C0 [3], FCC_IN [4] |
| 17 | PA13 | bidirectional | Universal digital I/O supporting UART0_RTS [2], TIMG0_C1 [3], UART1_RX [4] |
| 18 | PA14 | bidirectional | Universal digital I/O supporting UART1_CTS [2], CLK_OUT [3], UART1_TX [4], TIMG1_C0 [5] |
| 19 | PA15/A9 | bidirectional | Universal digital I/O and ADC0 analog input channel 9, supports UART1_RTS [2], I2C1_SCL [3], SPI0_CS2 [4], TIMG4_C1 [5] |
| 20 | PA16/A8/OPA1_OUT | bidirectional | Universal digital I/O, ADC0 analog input channel 8, and OPA1 output supporting COMP0_OUT [2], I2C1_SDA [3], SPI0_POCI [4], TIMG0_C0 [5], FCC_IN [6] |
| 21 | PA17/OPA1_IN1-/OPA1_IN0- | bidirectional | Universal digital I/O with shutdown wakeup and OPA1 differential input via IOMUX multiplexing, supports UART0_TX [2], I2C1_SCL [3], SPI0_SCK [4], TIMG4_C0 [5], SPI0_CS1 [6] |
| 22 | PA18/A7/OPA1_IN0+/GPAMP_IN- | bidirectional | Universal digital I/O with shutdown wakeup, ADC0 analog input channel 7, and analog peripheral inputs via IOMUX, supports UART0_RX [2], SPI0_PICO [3], I2C1_SDA [4], TIMG4_C1 [5] (BSL invoke) |
| 23 | PA19/SWDIO | bidirectional | High-speed universal digital I/O and serial wire debug data input/output, supports I2C1_SDA [3], SPI0_POCI [4] |
| 24 | PA20/A6/COMP0_IN1+/SWCLK | bidirectional | Universal digital I/O, ADC0 analog input channel 6, comparator positive input, and serial wire debug clock, supports I2C1_SCL [3], TIMG4_C0 [4] |
| 25 | PA21/A5/VREF- | bidirectional | Universal digital I/O, ADC0 analog input channel 5, and external voltage reference negative terminal supporting TIMG2_C0 [2], UART0_CTS [3], UART0_TX [4] |
| 26 | PA22/A4/GPAMP_OUT/OPA0_OUT | bidirectional | Universal digital I/O, ADC0 analog input channel 4, GPAMP and OPA0 output supporting UART0_RX [2], TIMG2_C1 [3], UART0_RTS [4], CLK_OUT [5], UART1_RX [6] (default BSL UART_RX) |
| 27 | PA23/VREF+/COMP0_IN1- | bidirectional | Universal digital I/O, external voltage reference positive, and comparator negative input supporting UART0_TX [2], SPI0_CS3 [3], TIMG0_C0 [4], UART0_CTS [5], UART1_TX [6] (default BSL UART_TX) |
| 28 | PA24/A3/OPA0_IN1-/OPA0_IN0- | bidirectional | Universal digital I/O, ADC0 analog input channel 3, and OPA0 differential input via IOMUX, supports SPI0_CS2 [2], TIMG0_C1 [3], UART0_RTS [4] |
| 29 | PA25/A2/OPA0_IN0+ | bidirectional | Universal digital I/O, ADC0 analog input channel 2, and OPA0 non-inverting input supporting TIMG4_C1 [2], UART0_TX [3], SPI0_PICO [4] |
| 30 | PA26/A1/GPAMP_IN+/COMP0_IN0+ | bidirectional | Universal digital I/O, ADC0 analog input channel 1, GPAMP non-inverting and COMP0 positive input via IOMUX, supports TIMG1_C0 [2], UART0_RX [3], SPI0_POCI [4] |
| 31 | PA27/A0/COMP0_IN0- | bidirectional | Universal digital I/O, ADC0 analog input channel 0, and COMP0 negative input supporting TIMG1_C1 [2], SPI0_CS3 [3] |
| 32 | VCORE | power_out | Internal core voltage regulator output nominally 1.35V, requires 470nF decoupling capacitor placed close to device without external loading |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32(5x5) |
| Category | Embedded Processors & Controllers |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
MSPM0L1306TRHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
- 3D model files:
mspm0l1306trhbr-etched.step/mspm0l1306trhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mspm0l1306trhbr.step/mspm0l1306trhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (84 pp, sha256
604064cec096983c, retrieved 2026-09-23, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).