Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

NB3V8312CFAG

onsemi · Clock Buffers, Drivers, Distributors · LQFP-32(7x7)

NB3V8312CFAG from onsemi, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Power Ground, Negative Power Supply
2 VDD power_in Positive Supply for Core and Inputs
3 CLK_EN input Synchronous Clock Enable Input; when High outputs are enabled, when Low outputs are disabled; internal pullup resistor
4 CLK input Single-ended Clock input, LVCMOS/LVTTL compatible; internal pull-down resistor
5 GND power_in Power Ground, Negative Power Supply
6 OE input Output Enable; internal pullup resistor
7 VDD power_in Positive Supply for Core and Inputs
8 GND power_in Power Ground, Negative Power Supply
9 Q11 output Single-ended LVCMOS/LVTTL output
10 VDDO power_in Positive Supply for Outputs
11 Q10 output Single-ended LVCMOS/LVTTL output
12 GND power_in Power Ground, Negative Power Supply
13 Q9 output Single-ended LVCMOS/LVTTL output
14 VDDO power_in Positive Supply for Outputs
15 Q8 output Single-ended LVCMOS/LVTTL output
16 GND power_in Power Ground, Negative Power Supply
17 GND power_in Power Ground, Negative Power Supply
18 Q7 output Single-ended LVCMOS/LVTTL output
19 VDDO power_in Positive Supply for Outputs
20 Q6 output Single-ended LVCMOS/LVTTL output
21 GND power_in Power Ground, Negative Power Supply
22 Q5 output Single-ended LVCMOS/LVTTL output
23 VDDO power_in Positive Supply for Outputs
24 Q4 output Single-ended LVCMOS/LVTTL output
25 GND power_in Power Ground, Negative Power Supply
26 Q3 output Single-ended LVCMOS/LVTTL output
27 VDDO power_in Positive Supply for Outputs
28 Q2 output Single-ended LVCMOS/LVTTL output
29 GND power_in Power Ground, Negative Power Supply
30 Q1 output Single-ended LVCMOS/LVTTL output
31 VDDO power_in Positive Supply for Outputs
32 Q0 output Single-ended LVCMOS/LVTTL output

Key specifications

Parameter Value
Manufacturer onsemi
Package LQFP-32(7x7)
Category Clock/Timing
Pins 32

CAD (KiCad official)

  • Symbol: NB3V8312CFAG
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: nb3v8312cfag-etched.step / nb3v8312cfag-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); nb3v8312cfag.step / nb3v8312cfag.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (11 pp, sha256 ffef321ea6dff8dc, retrieved 2026-09-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF