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MCP4551T-103E

Public Made by Adom

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Microchip Tech Digital Potentiometers, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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MCP4551T-103E

Microchip Tech · Digital Potentiometers · MSOP-8

MCP4551T-103E from Microchip Tech, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HVC/A0 input High Voltage Command / Address 0 input, latched at POR/BOR as the A0 address bit and, when at VIHH, marks the I2C command as a High Voltage command; high-voltage tolerant Schmitt-trigger input with smart pull-up.
2 SCL input I2C serial clock input from the host controller (slave device accepts only external clocks); high-voltage tolerant Schmitt-trigger input.
3 SDA bidirectional I2C serial data I/O with open-drain N-channel output driver; high-voltage tolerant Schmitt-trigger input.
4 VSS power_in Ground reference for the device.
5 P0A passive Potentiometer 0 terminal A, the fixed full-scale connection (wiper value 0x100 for 8-bit); voltage must be between VSS and VDD and the pin has no polarity.
6 P0W passive Potentiometer 0 wiper terminal; voltage must be between VSS and VDD and the pin has no polarity.
7 P0B passive Potentiometer 0 terminal B, the fixed zero-scale connection (wiper value 0x00); voltage must be between VSS and VDD and the pin has no polarity.
8 VDD power_in Positive power supply input relative to VSS; 2.7V to 5.5V specified, 1.8V to 5.5V device operation.

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package MSOP-8
Category ADC/DAC/Data Conversion
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
End-to-end resistance (-103 device) RAB 8 10 12 kΩ -103 devices (Note 1), ±20% 5
Supply Voltage VDD 2.7 5.5 V 4
Supply Voltage (serial interface only) VDD 1.8 2.7 V Serial Interface only 4
Wiper resistance RW 75 160 Ω VDD = 5.5 V, IW = 2.0 mA, code = 00h 5
Wiper resistance RW 75 300 Ω VDD = 2.7 V, IW = 2.0 mA, code = 00h 5
POR/BOR start voltage VBOR 1.65 V RAM retention voltage (VRAM) < VBOR 4
Delay after reset exit TBORD 10 20 µs VDD > VBOR 4
Supply current, active IDD 600 µA Serial Interface Active, VDD = 5.5V, FSCL = 3.4 MHz 4
Supply current, active IDD 250 µA Serial Interface Active, VDD = 5.5V, FSCL = 100 kHz 4
Supply current, inactive IDD 2.5 5 µA Serial Interface Inactive, Wiper = 0, VDD = 5.5V, HVC/A0 = VIH 4
HVC pin voltage range VHV 0 12.5 V VDD ≥ 4.5V; min is VSS 4
Nominal resistance tempco ΔRAB/ΔT 50 ppm/°C TA = -20°C to +70°C 5
Nominal resistance tempco ΔRAB/ΔT 100 ppm/°C TA = -40°C to +85°C 5
Nominal resistance tempco ΔRAB/ΔT 150 ppm/°C TA = -40°C to +125°C 5
Ratiometric tempco ΔVWB/ΔT 15 ppm/°C Code = Midscale (80h) 5
Resistor terminal input voltage range VA,VW,VB 0 V Vss to VDD; Note 5, Note 6 5
Max current through terminal W IT 2.5 mA Terminal W IAW or IBW, W = FS or ZS 6
Max current through A and B IAB 0.688 mA VB = 0V, VA = 5.5V, RAB(MIN) = 8000 Ω 6
Leakage current into A, W or B IWL 100 nA MCP4XX1 PxA = PxW = PxB = VSS 6
Full-scale error 10k 8-bit VWFSE -3.5 -0.1 LSb 10 k 8-bit, 3.0V ≤ VDD ≤ 5.5V 7
Zero-scale error 10k 8-bit VWZSE 0.1 3.5 LSb 10 k 8-bit, 3.0V ≤ VDD ≤ 5.5V 7
Potentiometer INL 8-bit INL -1 0.5 1 LSb 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 (Note 2); typ ±0.5 7
Potentiometer DNL 8-bit DNL -0.5 0.25 0.5 LSb 8-bit 3.0V ≤ VDD ≤ 5.5V, MCP4XX1 (Note 2); typ ±0.25 7
Rheostat INL 10k 8-bit R-INL -1.5 0.5 1.5 LSb 10 k 8-bit 5.5V, IW = 450 µA; typ ±0.5 9
Rheostat INL 10k 8-bit R-INL -5.5 2.5 5.5 LSb 10 k 8-bit 3.0V, IW = 240 µA (Note 7) 9
Rheostat DNL 10k 8-bit R-DNL -0.5 0.25 0.5 LSb 10 k 8-bit 5.5V, IW = 450 µA; typ ±0.25 10
Rheostat DNL 10k 8-bit R-DNL -1 0.25 1 LSb 10 k 8-bit 3.0V, IW = 240 µA (Note 7) 10
Bandwidth -3 dB 10k 8-bit BW 1 MHz 10 k 8-bit Code = 80h, load = 30 pF 8
Schmitt trigger high input threshold (not SDA/SCL) VIH 0.45 V min 0.45 VDD, 2.7V ≤ VDD ≤ 5.5V; 0.5 VDD for 1.8V ≤ VDD ≤ 2.7V 11
Schmitt trigger high input threshold SDA/SCL VIH 0.7 12.5 V min 0.7 VDD, max VMAX; 100 kHz to 3.4 MHz 11
Schmitt trigger low input threshold (not SDA/SCL) VIL 0.2 V max 0.2 VDD; all inputs except SDA and SCL 11
Schmitt trigger low input threshold SDA/SCL VIL -0.5 0.3 V max 0.3 VDD; SDA and SCL, all modes 11
High voltage limit VMAX 12.5 V Pin can tolerate VMAX or less 11
Output low voltage (SDA) VOL 0 0.4 V VDD ≥ 2.0V, IOL = 3 mA 12
Output low voltage (SDA) VOL 0 0.2 V max 0.2 VDD; VDD < 2.0V, IOL = 1 mA 12
Input leakage current IIL -1 1 µA VIN = VDD and VIN = VSS 12
Pin capacitance CIN, COUT 10 pF fC = 3.4 MHz 12
Terminal A capacitance CAW 75 pF f = 1 MHz, Code = Full-Scale 10
Wiper capacitance CW 120 pF f = 1 MHz, Code = Full-Scale 10
Terminal B capacitance CBW 75 pF f = 1 MHz, Code = Full-Scale 10
HVC pull-up/pull-down resistance RHVC 16 kΩ VDD = 5.5V, VHVC = 3V 12
SCL clock frequency, standard mode FSCL 0 100 kHz Cb = 400 pF, 1.8V - 5.5V 13
SCL clock frequency, fast mode FSCL 0 400 kHz Cb = 400 pF, 2.7V - 5.5V 13
SCL clock frequency, high-speed 3.4 FSCL 0 3.4 MHz Cb = 100 pF, 4.5V - 5.5V 13
Clock high time, 100 kHz THIGH 4000 ns 100 kHz mode, 1.8V-5.5V 14
Clock high time, 400 kHz THIGH 600 ns 400 kHz mode, 2.7V-5.5V 14
Clock low time, 100 kHz TLOW 4700 ns 100 kHz mode, 1.8V-5.5V 14
Clock low time, 400 kHz TLOW 1300 ns 400 kHz mode, 2.7V-5.5V 14
Output valid from clock, 400 kHz TAA 900 ns 400 kHz mode, Note 1 15
Output valid from clock, 3.4 MHz TAA 150 ns 3.4 MHz mode, Cb = 100 pF, Note 1 15
Absolute max VDD VDD -0.6 7 V with respect to VSS 3
Absolute max HVC/A0, A1, A2, SCL, SDA -0.6 12.5 V with respect to VSS 3
Input clamp current IIK -20 20 mA VI < 0, VI > VDD, VI > VPP on HV pins 3
Output clamp current IOK -20 20 mA VO < 0 or VO > VDD 3
Max current into PxA, PxW, PxB -2.5 2.5 mA 3
Storage temperature -65 150 °C 3
Ambient temperature with power applied -40 125 °C 3
Maximum junction temperature TJ 150 °C 3
Operating temperature range TA -40 125 °C Extended 16
Thermal resistance 8L-MSOP θJA 211 °C/W 16

CAD (KiCad official)

  • Symbol: MCP4551T-103E
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: mcp4551t-103e-etched.step / mcp4551t-103e-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mcp4551t-103e.step / mcp4551t-103e.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (102 pp, sha256 ee77464c39584a73, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF