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Contents

README

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XC6206P282MR-JSM

JSMSEMI · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

XC6206P282MR-JSM from JSMSEMI, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS power_in Chip ground terminal (芯片接地端); output voltage is rated from Vss-0.3 V to Vout+0.3 V.
2 VOUT power_out Regulator output (芯片输出端), 2.8 V ±2.5% for this part, 100 mA minimum rated max output current (Iout max) and 300 mA absolute-max output current, with current limit and short-circuit protection.
3 VIN power_in Supply input (启动输入端), absolute maximum 6.5 V and listed input voltage range 1.8 V to 8.0 V.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOT-23-3
Category Power Management (PMIC)
Pins 3

CAD (KiCad official)

  • Symbol: XC6206P282MR-JSM
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: xc6206p282mr-jsm-etched.step / xc6206p282mr-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); xc6206p282mr-jsm.step / xc6206p282mr-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (8 pp, sha256 8f2dccc5b8c1fa03, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF