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Contents

README

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SN74AHCT08N

Texas Instruments · Gates · PDIP-14

SN74AHCT08N from Texas Instruments, in a PDIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 input A, TTL-compatible (VIH min 2 V, VIL max 0.8 V) and tolerant up to 5.5 V.
2 1B input Gate 1 input B, TTL-compatible (VIH min 2 V, VIL max 0.8 V) and tolerant up to 5.5 V.
3 1Y output Gate 1 AND output (Y = A·B), rated for ±8 mA recommended output current.
4 2A input Gate 2 input A, TTL-compatible (VIH min 2 V, VIL max 0.8 V) and tolerant up to 5.5 V.
5 2B input Gate 2 input B, TTL-compatible (VIH min 2 V, VIL max 0.8 V) and tolerant up to 5.5 V.
6 2Y output Gate 2 AND output (Y = A·B), rated for ±8 mA recommended output current.
7 GND power_in Ground pin.
8 3Y output Gate 3 AND output (Y = A·B), rated for ±8 mA recommended output current.
9 3A input Gate 3 input A, TTL-compatible (VIH min 2 V, VIL max 0.8 V) and tolerant up to 5.5 V.
10 3B input Gate 3 input B, TTL-compatible (VIH min 2 V, VIL max 0.8 V) and tolerant up to 5.5 V.
11 4Y output Gate 4 AND output (Y = A·B), rated for ±8 mA recommended output current.
12 4A input Gate 4 input A, TTL-compatible (VIH min 2 V, VIL max 0.8 V) and tolerant up to 5.5 V.
13 4B input Gate 4 input B, TTL-compatible (VIH min 2 V, VIL max 0.8 V) and tolerant up to 5.5 V.
14 VCC power_in Power supply pin, recommended 4.5 V to 5.5 V, with a 0.1 µF bypass capacitor placed close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage range VCC -0.5 7 V 4
Input voltage range VI -0.5 7 V 4
Output voltage range VO -0.5 7.5 V VCC + 0.5 V as printed 4
Input clamp current IIK -20 mA VI < 0 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 4
Continuous output current IO -25 25 mA VO = 0 to VCC 4
Continuous current through VCC or GND -50 50 mA 4
Storage temperature range Tstg -65 150 °C 4
Junction temperature TJ 150 °C 4
ESD HBM V(ESD) -2000 2000 V ANSI/ESDA/JEDEC JS-001 4
ESD CDM V(ESD) -1000 1000 V JESD22-C101 4
Supply voltage VCC 4.5 5.5 V 4
High-level input voltage VIH 2 V 4
Low-level input voltage VIL 0.8 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 5.5 V VCC as printed (0 to VCC) 4
High-level output current IOH -8 mA 4
Low-level output current IOL 8 mA 4
Input transition rise or fall rate Δt/Δv 20 ns/V 4
Operating free-air temperature TA -40 125 °C 4
Junction-to-ambient thermal resistance RθJA 59.7 °C/W N (PDIP) 14 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 47.3 °C/W N (PDIP) 14 pins 5
Junction-to-board thermal resistance RθJB 39.5 °C/W N (PDIP) 14 pins 5
Junction-to-top characterization parameter ψJT 32.4 °C/W N (PDIP) 14 pins 5
Junction-to-board characterization parameter ψJB 39.4 °C/W N (PDIP) 14 pins 5
High-level output voltage VOH 4.4 V IOH = -50 µA, VCC = 4.5 V 5
High-level output voltage VOH 3.8 V IOH = -8 mA, VCC = 4.5 V 5
Low-level output voltage VOL 0.1 V IOL = 50 µA, VCC = 4.5 V 5
Low-level output voltage VOL 0.44 V IOL = 8 mA, VCC = 4.5 V 5
Input leakage current II -1 1 µA VI = 5.5 V or GND, VCC = 0 V to 5.5 V 5
Supply current ICC 20 µA VI = VCC or GND, IO = 0, VCC = 5.5 V 5
Increase in supply current ΔICC 1.5 mA One input at 3.4 V, other inputs at VCC or GND, VCC = 5.5 V 5
Input capacitance Ci 4 10 pF VI = VCC or GND, VCC = 5 V 5
Propagation delay A or B to Y (tPLH) tPLH 1 8 ns CL = 15 pF, VCC = 5 V ± 0.5 V 5
Propagation delay A or B to Y (tPHL) tPHL 1 8 ns CL = 15 pF, VCC = 5 V ± 0.5 V 5
Propagation delay A or B to Y (tPLH) tPLH 1 5.5 9 ns CL = 50 pF, VCC = 5 V ± 0.5 V 5
Propagation delay A or B to Y (tPHL) tPHL 1 5.5 9 ns CL = 50 pF, VCC = 5 V ± 0.5 V 5
Power dissipation capacitance Cpd 18 pF No load, f = 1 MHz, VCC = 5 V, TA = 25°C 6

CAD (KiCad official)

  • Symbol: SN74AHCT08N
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: PDIP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ahct08n-etched.step / sn74ahct08n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ahct08n.step / sn74ahct08n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 c39812c449f47a3b, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF