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Contents

README

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TLV2553IDWR

Texas Instruments · Analog To Digital Converters (ADCs) · SOIC-20-300mil

TLV2553IDWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 AIN0 input Analog input channel 0; one of 11 analog-signal inputs (AIN0 to AIN10) that are internally multiplexed.
2 AIN1 input Analog input channel 1; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
3 AIN2 input Analog input channel 2; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
4 AIN3 input Analog input channel 3; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
5 AIN4 input Analog input channel 4; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
6 AIN5 input Analog input channel 5; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
7 AIN6 input Analog input channel 6; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
8 AIN7 input Analog input channel 7; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
9 AIN8 input Analog input channel 8; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
10 GND power_in Ground return terminal for the internal circuitry; all voltage measurements are with respect to GND unless otherwise noted.
11 AIN9 input Analog input channel 9; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
12 AIN10 input Analog input channel 10; one of 11 internally multiplexed analog-signal inputs (AIN0 to AIN10).
13 REF- input Negative reference voltage, nominally ground; connected to the ADC analog ground when the internal reference is used.
14 REF+ input Positive reference voltage, nominally VCC; the maximum analog input range is the difference between REF+ and REF-.
15 CS input Chip select; a high-to-low transition resets the internal counters and enables DATA OUT, DATA IN and I/O CLOCK, and a low-to-high transition disables DATA IN and I/O CLOCK within a setup time.
16 DATA OUT tri_state 3-state serial output for the A/D conversion result; high impedance when CS is high and active when CS is low, with data changing on the falling edge of I/O CLOCK.
17 DATA IN input Serial data input for the 4-bit address/command and configuration bits, presented MSB (D7) first and shifted in on the I/O CLOCK rising edges.
18 I/O CLOCK input Input/output clock that shifts serial data in and out, starts charging the selected analog input on the fourth falling edge, and hands conversion control to the internal state controller on the last falling edge.
19 EOC output End-of-conversion status output; it goes low after the last I/O CLOCK falling edge and returns high when conversion is complete and data is ready for transfer.
20 VCC power_in Positive supply voltage.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-20-300mil
Category ADC/DAC/Data Conversion
Pins 20

CAD (KiCad official)

  • Symbol: TLV2553IDWR
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: tlv2553idwr-etched.step / tlv2553idwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2553idwr.step / tlv2553idwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (43 pp, sha256 fe5ed762ddf82677, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF