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ATSAMD21J17A-AUT

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Microchip Tech Microcontroller Units (MCUs/MPUs/SOCs), TQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentsingle chip microcomputer-microcontrolleratsamd21j17a-autfactory-2.0.0extractor-text

Verified ATSAMD21J17A-AUT

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 64 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: ATSAMD21J17A-AUT · TQFP-64(10x10) · 64 pins
  • ✓copper: 64 copper pads, none touching another net
  • ✓datasheet: all 64 pin names found in the 1115-page datasheet
  • ✓distributor: lcsc C2651956, digikey ATSAMD21J17A-AUTTR-ND, mouser 556-ATSAMD21J17A-AUT
  • ✓family: TQFP-64_10x10mm_P0.5mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-uieyjp64/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 64 pins = 64 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 64 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ atsamd21j17a-aut.kicad_sym✓ atsamd21j17a-aut.kicad_mod✓ atsamd21j17a-aut.step
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3D Model

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Contents

README

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ATSAMD21J17A-AUT

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · TQFP-64(10x10)

ATSAMD21J17A-AUT from Microchip Tech, in a TQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA00 bidirectional Port A GPIO bit 0 on the VDDANA domain, also EXTINT[0], SERCOM1/PAD[0], TCC2/WO[0] and the 32 kHz crystal input XIN32 when XOSC32K is used.
2 PA01 bidirectional Port A GPIO bit 1 on the VDDANA domain, also EXTINT[1], SERCOM1/PAD[1], TCC2/WO[1] and the 32 kHz crystal output XOUT32 when XOSC32K is used.
3 PA02 bidirectional Port A GPIO bit 2 on the VDDANA domain, also analog input AIN[0], PTC input Y[0], DAC output VOUT, EXTINT[2] and TCC3/WO[0].
4 PA03 bidirectional Port A GPIO bit 3 on the VDDANA domain, also analog input AIN[1], PTC input Y[1], external analog reference VREFA, EXTINT[3] and TCC3/WO[1].
5 PB04 bidirectional Port B GPIO bit 4 on the VDDANA domain, also analog input AIN[12], PTC input Y[10] and EXTINT[4].
6 PB05 bidirectional Port B GPIO bit 5 on the VDDANA domain, also analog input AIN[13], PTC input Y[11] and EXTINT[5].
7 GNDANA power_in Ground for the analog power domain.
8 VDDANA power_in Analog supply voltage, 1.62 V to 3.63 V for SAM D21, decoupled with 100 nF and 10 µF capacitors per the schematic checklist.
9 PB06 bidirectional Port B GPIO bit 6 on the VDDANA domain, also analog input AIN[14], PTC input Y[12] and EXTINT[6].
10 PB07 bidirectional Port B GPIO bit 7 on the VDDANA domain, also analog input AIN[15], PTC input Y[13] and EXTINT[7].
11 PB08 bidirectional Port B GPIO bit 8 on the VDDANA domain, also analog input AIN[2], PTC input Y[14], EXTINT[8], SERCOM4/PAD[0], TC4/WO[0] and TCC3/WO[6].
12 PB09 bidirectional Port B GPIO bit 9 on the VDDANA domain, also analog input AIN[3], PTC input Y[15], EXTINT[9], SERCOM4/PAD[1], TC4/WO[1] and TCC3/WO[7].
13 PA04 bidirectional Port A GPIO bit 4 on the VDDANA domain, also ADC reference VREFB, analog inputs AIN[4] and AIN[0], PTC input Y[2], EXTINT[4], SERCOM0/PAD[0], TCC0/WO[0] and TCC3/WO[2].
14 PA05 bidirectional Port A GPIO bit 5 on the VDDANA domain, also analog inputs AIN[5] and AIN[1], PTC input Y[3], EXTINT[5], SERCOM0/PAD[1], TCC0/WO[1] and TCC3/WO[3].
15 PA06 bidirectional Port A GPIO bit 6 on the VDDANA domain, also analog inputs AIN[6] and AIN[2], PTC input Y[4], EXTINT[6], SERCOM0/PAD[2], TCC1/WO[0] and TCC3/WO[4].
16 PA07 bidirectional Port A GPIO bit 7 on the VDDANA domain, also analog inputs AIN[7] and AIN[3], PTC input Y[5], EXTINT[7], SERCOM0/PAD[3], TCC1/WO[1] and TCC3/WO[5].
17 PA08 bidirectional Port A GPIO bit 8 on the VDDIO domain, also NMI, analog input AIN[16], PTC input X[0], SERCOM0/PAD[0], SERCOM2/PAD[0], TCC0/WO[0] and TCC1/WO[2]; usable for SERCOM I2C Hs mode.
18 PA09 bidirectional Port A GPIO bit 9 on the VDDIO domain, also EXTINT[9], analog input AIN[17], PTC input X[1], SERCOM0/PAD[1], SERCOM2/PAD[1], TCC0/WO[1] and TCC1/WO[3]; usable for SERCOM I2C Hs mode.
19 PA10 bidirectional Port A GPIO bit 10 on the VDDIO domain, also EXTINT[10], analog input AIN[18], PTC input X[2], SERCOM0/PAD[2], SERCOM2/PAD[2], TCC1/WO[0], TCC0/WO[2] and GCLK_IO[4].
20 PA11 bidirectional Port A GPIO bit 11 on the VDDIO domain, also EXTINT[11], analog input AIN[19], PTC input X[3], SERCOM0/PAD[3], SERCOM2/PAD[3], TCC1/WO[1], TCC0/WO[3] and GCLK_IO[5].
21 VDDIO power_in Digital I/O supply voltage, 1.62 V to 3.63 V, decoupled with 100 nF and 10 µF capacitors.
22 GND power_in Digital ground.
23 PB10 bidirectional Port B GPIO bit 10 on the VDDIO domain, also EXTINT[10], SERCOM4/PAD[2], TC5/WO[0], TCC0/WO[4] and GCLK_IO[4].
24 PB11 bidirectional Port B GPIO bit 11 on the VDDIO domain, also EXTINT[11], SERCOM4/PAD[3], TC5/WO[1], TCC0/WO[5] and GCLK_IO[5].
25 PB12 bidirectional Port B GPIO bit 12 on the VDDIO domain, also EXTINT[12], PTC input X[12], SERCOM4/PAD[0], TC4/WO[0], TCC0/WO[6] and GCLK_IO[6]; usable for SERCOM I2C Hs mode.
26 PB13 bidirectional Port B GPIO bit 13 on the VDDIO domain, also EXTINT[13], PTC input X[13], SERCOM4/PAD[1], TC4/WO[1], TCC0/WO[7] and GCLK_IO[7]; usable for SERCOM I2C Hs mode.
27 PB14 bidirectional Port B GPIO bit 14 on the VDDIO domain, also EXTINT[14], PTC input X[14], SERCOM4/PAD[2], TC5/WO[0] and GCLK_IO[0].
28 PB15 bidirectional Port B GPIO bit 15 on the VDDIO domain, also EXTINT[15], PTC input X[15], SERCOM4/PAD[3], TC5/WO[1] and GCLK_IO[1].
29 PA12 bidirectional Port A GPIO bit 12 on the VDDIO domain, also EXTINT[12], SERCOM2/PAD[0], SERCOM4/PAD[0], TCC2/WO[0], TCC0/WO[6] and analog comparator output AC/CMP[0]; usable for SERCOM I2C Hs mode.
30 PA13 bidirectional Port A GPIO bit 13 on the VDDIO domain, also EXTINT[13], SERCOM2/PAD[1], SERCOM4/PAD[1], TCC2/WO[1], TCC0/WO[7] and analog comparator output AC/CMP[1]; usable for SERCOM I2C Hs mode.
31 PA14 bidirectional Port A GPIO bit 14 on the VDDIO domain, also EXTINT[14], SERCOM2/PAD[2], SERCOM4/PAD[2], TC3/WO[0], TCC0/WO[4] and GCLK_IO[0]; it is the XIN crystal input when XOSC is used.
32 PA15 bidirectional Port A GPIO bit 15 on the VDDIO domain, also EXTINT[15], SERCOM2/PAD[3], SERCOM4/PAD[3], TC3/WO[1], TCC0/WO[5] and GCLK_IO[1]; it is the XOUT crystal output when XOSC is used.
33 GND power_in Digital ground.
34 VDDIO power_in Digital I/O supply voltage, 1.62 V to 3.63 V, decoupled with 100 nF and 10 µF capacitors.
35 PA16 bidirectional Port A GPIO bit 16 on the VDDIO domain, also EXTINT[0], PTC input X[4], SERCOM1/PAD[0], SERCOM3/PAD[0], TCC2/WO[0], TCC0/WO[6] and GCLK_IO[2]; usable for SERCOM I2C Hs mode.
36 PA17 bidirectional Port A GPIO bit 17 on the VDDIO domain, also EXTINT[1], PTC input X[5], SERCOM1/PAD[1], SERCOM3/PAD[1], TCC2/WO[1], TCC0/WO[7] and GCLK_IO[3]; usable for SERCOM I2C Hs mode.
37 PA18 bidirectional Port A GPIO bit 18 on the VDDIO domain, also EXTINT[2], PTC input X[6], SERCOM1/PAD[2], SERCOM3/PAD[2], TC3/WO[0], TCC0/WO[2] and analog comparator output AC/CMP[0].
38 PA19 bidirectional Port A GPIO bit 19 on the VDDIO domain, also EXTINT[3], PTC input X[7], SERCOM1/PAD[3], SERCOM3/PAD[3], TC3/WO[1], TCC0/WO[3] and analog comparator output AC/CMP[1].
39 PB16 bidirectional Port B GPIO bit 16 on the VDDIO domain, also EXTINT[0], SERCOM5/PAD[0], TC6/WO[0], TCC0/WO[4] and GCLK_IO[2]; usable for SERCOM I2C Hs mode.
40 PB17 bidirectional Port B GPIO bit 17 on the VDDIO domain, also EXTINT[1], SERCOM5/PAD[1], TC6/WO[1], TCC0/WO[5] and GCLK_IO[3]; usable for SERCOM I2C Hs mode.
41 PA20 bidirectional Port A GPIO bit 20 on the VDDIO domain, also EXTINT[4], PTC input X[8], SERCOM5/PAD[2], SERCOM3/PAD[2], TC7/WO[0], TCC0/WO[6] and GCLK_IO[4].
42 PA21 bidirectional Port A GPIO bit 21 on the VDDIO domain, also EXTINT[5], PTC input X[9], SERCOM5/PAD[3], SERCOM3/PAD[3], TC7/WO[1], TCC0/WO[7] and GCLK_IO[5].
43 PA22 bidirectional Port A GPIO bit 22 on the VDDIO domain, also EXTINT[6], PTC input X[10], SERCOM3/PAD[0], SERCOM5/PAD[0], TC4/WO[0], TCC0/WO[4] and GCLK_IO[6]; usable for SERCOM I2C Hs mode.
44 PA23 bidirectional Port A GPIO bit 23 on the VDDIO domain, also EXTINT[7], PTC input X[11], SERCOM3/PAD[1], SERCOM5/PAD[1], TC4/WO[1], TCC0/WO[5], the 1 kHz USB SOF output and GCLK_IO[7]; usable for SERCOM I2C Hs mode.
45 PA24 bidirectional Port A GPIO bit 24 on the VDDIO domain, also USB D- (DM), EXTINT[12], SERCOM3/PAD[2], SERCOM5/PAD[2], TC5/WO[0] and TCC1/WO[2]; it has no drive strength option and a pull-up is recommended if the pin is unconnected.
46 PA25 bidirectional Port A GPIO bit 25 on the VDDIO domain, also USB D+ (DP), EXTINT[13], SERCOM3/PAD[3], SERCOM5/PAD[3], TC5/WO[1] and TCC1/WO[3]; it has no drive strength option and a pull-up is recommended if the pin is unconnected.
47 GND power_in Digital ground.
48 VDDIO power_in Digital I/O supply voltage, 1.62 V to 3.63 V, decoupled with 100 nF and 10 µF capacitors.
49 PB22 bidirectional Port B GPIO bit 22 on the VDDIO domain, also EXTINT[6], SERCOM5/PAD[2], TC7/WO[0], TCC3/WO[0] and GCLK_IO[0].
50 PB23 bidirectional Port B GPIO bit 23 on the VDDIO domain, also EXTINT[7], SERCOM5/PAD[3], TC7/WO[1], TCC3/WO[1] and GCLK_IO[1].
51 PA27 bidirectional Port A GPIO bit 27 on the VDDIO domain, also EXTINT[15], TCC3/WO[6] and GCLK_IO[0].
52 RESET input External active-low reset input with an internal pull-up; reset threshold is below 0.36 x VDDIO at 2.7 V to 3.6 V VDDIO (below 0.33 x VDDIO at 1.6 V to 2.0 V).
53 PA28 bidirectional Port A GPIO bit 28 on the VDDIO domain, also EXTINT[8], TCC3/WO[7] and GCLK_IO[0].
54 GND power_in Digital ground.
55 VDDCORE power_out Regulated core supply output from the internal voltage regulator, 1.6 V to 1.8 V, to be decoupled with a 1 µF capacitor.
56 VDDIN power_in Input supply to the internal voltage regulator, 1.62 V to 3.63 V.
57 PA30 bidirectional Port A GPIO bit 30 on the VDDIO domain, also EXTINT[10], SERCOM1/PAD[2], TCC1/WO[0], TCC3/WO[4], GCLK_IO[0] and the SWCLK debug clock pin.
58 PA31 bidirectional Port A GPIO bit 31 on the VDDIO domain, also EXTINT[11], SERCOM1/PAD[3], TCC1/WO[1] and TCC3/WO[5], and the SWDIO function that is only activated in the presence of a debugger.
59 PB30 bidirectional Port B GPIO bit 30 on the VDDIO domain, also EXTINT[14], SERCOM5/PAD[0], TCC0/WO[0] and TCC1/WO[2]; usable for SERCOM I2C Hs mode.
60 PB31 bidirectional Port B GPIO bit 31 on the VDDIO domain, also EXTINT[15], SERCOM5/PAD[1], TCC0/WO[1] and TCC1/WO[3]; usable for SERCOM I2C Hs mode.
61 PB00 bidirectional Port B GPIO bit 0 on the VDDANA domain, also EXTINT[0], analog input AIN[8], PTC input Y[6], SERCOM5/PAD[2] and TC7/WO[0].
62 PB01 bidirectional Port B GPIO bit 1 on the VDDANA domain, also EXTINT[1], analog input AIN[9], PTC input Y[7], SERCOM5/PAD[3] and TC7/WO[1].
63 PB02 bidirectional Port B GPIO bit 2 on the VDDANA domain, also EXTINT[2], analog input AIN[10], PTC input Y[8], SERCOM5/PAD[0], TC6/WO[0] and TCC3/WO[2].
64 PB03 bidirectional Port B GPIO bit 3 on the VDDANA domain, also EXTINT[3], analog input AIN[11], PTC input Y[9], SERCOM5/PAD[1], TC6/WO[1] and TCC3/WO[3].

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package TQFP-64(10x10)
Category Single Chip Microcomputer/Microcontroller
Pins 64

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDDIO supply voltage (I/O, OSC8M, XOSC) VDDIO 1.62 3.63 V 36
VDDIN supply voltage (I/O and internal regulator) VDDIN 1.62 3.63 V 36
VDDANA supply voltage (I/O, ADC, AC, DAC, PTC, oscillators) VDDANA 1.62 3.63 V 36
Operating temperature range, package grade U -40 85 °C Ordering grade U (-40 - 85°C Matte Sn Plating) per Ordering Information key 17

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin including indium tin oxide (ITO) sensor grids. The PTC requires one pin per X-line and one pin per Y-line. In the self-capacitance mode, the PTC requires only one pin (Y-line) for each touch sensor. 860

CAD (KiCad official)

  • Symbol: ATSAMD21J17A-AUT
  • Footprint: Package_QFP:TQFP-64_10x10mm_P0.5mm
  • 3D model: TQFP-64(10x10) (KiCad packages3D, STEP)
  • 3D model files: atsamd21j17a-aut-etched.step / atsamd21j17a-aut-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atsamd21j17a-aut.step / atsamd21j17a-aut.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (1115 pp, sha256 fa4f0ff2d3143238, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF