TLV2463CDGSR from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1OUT	output	Channel 1 rail-to-rail output with high output drive capability.
2	1IN−	input	Channel 1 inverting input, whose common-mode range extends beyond the supply rails.
3	1IN+	input	Channel 1 noninverting input, whose common-mode range extends beyond the supply rails.
4	GND	power_in	Ground, the reference for all voltage values except differential voltages.
5	1SHDN	input	Channel 1 shutdown control that puts the amplifier in an ultralow supply current mode (0.3 µA/channel) with a high-impedance output.
6	2SHDN	input	Channel 2 shutdown control that puts the amplifier in an ultralow supply current mode (0.3 µA/channel) with a high-impedance output.
7	2IN+	input	Channel 2 noninverting input, whose common-mode range extends beyond the supply rails.
8	2IN−	input	Channel 2 inverting input, whose common-mode range extends beyond the supply rails.
9	2OUT	output	Channel 2 rail-to-rail output with high output drive capability.
10	VDD+	power_in	Positive supply, 2.7 V to 6 V operating with an absolute maximum of 6 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VSSOP-10-0.5mm
Category	Operational Amplifier/Comparator
Pins	10

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage (absolute max)	VDD			6	V		6
Input current (any input)	II	-200		200	mA		6
Output current	IO	-175		175	mA		6
Total input current (into VDD+)	II			175	mA		6
Total output current (out of GND)	IO			175	mA		6
Operating free-air temperature, C suffix (absolute max)	TA	0		70	°C	C suffix	6
Maximum junction temperature	TJ			150	°C		6
Storage temperature range	Tstg	-65		150	°C		6
Lead temperature				260	°C	1,6 mm (1/16 inch) from case for 10 seconds	6
Thermal resistance junction-to-case, DGS	θJC		54.1		°C/W	DGS package, C and I suffix; not production tested	6
Thermal resistance junction-to-ambient, DGS	θJA		257.7		°C/W	DGS package, C and I suffix; not production tested	6
Power rating, DGS			485		mW	TA ≤ 25°C	6
Power rating, DGS			97		mW	TA < 125°C	6
Supply voltage, single supply	VDD	2.7		6	V	Single supply	7
Supply voltage, split supply	VDD	-1.35		3	V	Split supply, ±1.35 to ±3	7
Common-mode input voltage range	VICR	0			V	0 to VDD	7
Operating free-air temperature, C-suffix	TA	0		70	°C	C-suffix	7
Shutdown high-level voltage	VIH	2			V	Relative to GND terminal	7
Shutdown low-level voltage	VIL			0.7	V	Relative to GND terminal	7
Input offset voltage	VIO		500	2000	µV	VDD = 3 V, VIC = 1.5 V, VO = 1.5 V, RS = 50 Ω, 25°C	7
Input offset voltage, full range	VIO			2200	µV	VDD = 3 V, VIC = 1.5 V, VO = 1.5 V, RS = 50 Ω, Full range	7
Temperature coefficient of input offset voltage	αVIO		2		µV/°C	VDD = 3 V, RS = 50 Ω	7
Input offset current	IIO		2.8	7	nA	VDD = 3 V, VIC = 1.5 V, 25°C	7
Input offset current, C full range	IIO			20	nA	VDD = 3 V, TLV246xC, Full range	7
Input bias current	IIB		4.4	14	nA	VDD = 3 V, VIC = 1.5 V, 25°C	7
Input bias current, C full range	IIB			25	nA	VDD = 3 V, TLV246xC, Full range	7
High-level output voltage	VOH	2.9			V	VDD = 3 V, IOH = -2.5 mA, 25°C	7
High-level output voltage, full range	VOH	2.8			V	VDD = 3 V, IOH = -2.5 mA, Full range	7
High-level output voltage	VOH	2.7			V	VDD = 3 V, IOH = -10 mA, 25°C	7
High-level output voltage, full range	VOH	2.5			V	VDD = 3 V, IOH = -10 mA, Full range	7
Low-level output voltage	VOL			0.1	V	VDD = 3 V, VIC = 1.5 V, IOL = 2.5 mA, 25°C	7
Low-level output voltage, full range	VOL			0.2	V	VDD = 3 V, VIC = 1.5 V, IOL = 2.5 mA, Full range	7
Low-level output voltage	VOL			0.3	V	VDD = 3 V, VIC = 1.5 V, IOL = 10 mA, 25°C	7
Low-level output voltage, full range	VOL			0.5	V	VDD = 3 V, VIC = 1.5 V, IOL = 10 mA, Full range	7
Short-circuit output current, sourcing	IOS	50			mA	VDD = 3 V, Sourcing, 25°C	7
Short-circuit output current, sourcing, full range	IOS	20			mA	VDD = 3 V, Sourcing, Full range	7
Short-circuit output current, sinking	IOS	40			mA	VDD = 3 V, Sinking, 25°C	7
Short-circuit output current, sinking, full range	IOS	20			mA	VDD = 3 V, Sinking, Full range	7
Large-signal differential voltage amplification	AVD	90	105		dB	VDD = 3 V, RL = 10 kΩ, VO(PP) = 1 V, 25°C	7
Large-signal differential voltage amplification, full range	AVD	89			dB	VDD = 3 V, RL = 10 kΩ, VO(PP) = 1 V, Full range	7
Common-mode rejection ratio	CMRR	66	80		dB	VDD = 3 V, VICR = 0 to 3 V, RS = 50 Ω, 25°C	8
Common-mode rejection ratio, C full range	CMRR	64			dB	VDD = 3 V, VICR = 0 to 3 V, RS = 50 Ω, TLV246xC, Full range	8
Supply voltage rejection ratio	kSVR	80	85		dB	VDD = 2.7 V to 6 V, VIC = VDD/2, No load, 25°C	8
Supply voltage rejection ratio, full range	kSVR	75			dB	VDD = 2.7 V to 6 V, VIC = VDD/2, No load, Full range	8
Supply voltage rejection ratio	kSVR	85	95		dB	VDD = 3 V to 5 V, VIC = VDD/2, No load, 25°C	8
Supply voltage rejection ratio, full range	kSVR	80			dB	VDD = 3 V to 5 V, VIC = VDD/2, No load, Full range	8
Supply current per channel	IDD		0.5	0.575	mA	VDD = 3 V, VO = 1.5 V, No load, 25°C	8
Supply current per channel, full range	IDD			0.9	mA	VDD = 3 V, VO = 1.5 V, No load, Full range	8
Supply current in shutdown per channel	IDD(SHDN)		0.3		µA	VDD = 3 V, SHDN < 0.7 V, 25°C	8
Supply current in shutdown per channel, full range	IDD(SHDN)			2.5	µA	VDD = 3 V, SHDN < 0.7 V, Full range	8
Slew rate at unity gain	SR	0.9	1.6		V/µs	VDD = 3 V, VO(PP) = 0.8 V, CL = 160 pF, RL = 10 kΩ, 25°C	8
Slew rate at unity gain, full range	SR	0.8			V/µs	VDD = 3 V, VO(PP) = 0.8 V, CL = 160 pF, RL = 10 kΩ, Full range	8
Input offset voltage	VIO		500	2000	µV	VDD = 5 V, VIC = 2.5 V, VO = 2.5 V, RS = 50 Ω, 25°C	9
Input offset voltage, full range	VIO			2200	µV	VDD = 5 V, Full range	9
Input offset current	IIO		0.3	7	nA	VDD = 5 V, VIC = 2.5 V, 25°C	9
Input offset current, C full range	IIO			15	nA	VDD = 5 V, TLV246xC, Full range	9
Input bias current	IIB		1.3	14	nA	VDD = 5 V, VIC = 2.5 V, 25°C	9
Input bias current, C full range	IIB			30	nA	VDD = 5 V, TLV246xC, Full range	9
High-level output voltage	VOH	4.9			V	VDD = 5 V, IOH = -2.5 mA, 25°C	9
High-level output voltage	VOH	4.8			V	VDD = 5 V, IOH = -10 mA, 25°C	9
Low-level output voltage	VOL			0.1	V	VDD = 5 V, VIC = 2.5 V, IOL = 2.5 mA, 25°C	9
Low-level output voltage	VOL			0.2	V	VDD = 5 V, VIC = 2.5 V, IOL = 10 mA, 25°C	9
Short-circuit output current, sourcing	IOS	145			mA	VDD = 5 V, Sourcing, 25°C	9
Short-circuit output current, sinking	IOS	100			mA	VDD = 5 V, Sinking, 25°C	9
Large-signal differential voltage amplification	AVD	92	109		dB	VDD = 5 V, VIC = 2.5 V, VO = 1 V to 4 V, RL = 10 kΩ, 25°C	9
Common-mode rejection ratio	CMRR	71	85		dB	VDD = 5 V, VICR = 0 V to 5 V, RS = 50 Ω, 25°C	9
Common-mode rejection ratio, C full range	CMRR	69			dB	VDD = 5 V, VICR = 0 V to 5 V, RS = 50 Ω, TLV246xC, Full range	9
Supply current per channel	IDD		0.55	0.65	mA	VDD = 5 V, VO = 2.5 V, No load, 25°C	9
Supply current per channel, full range	IDD			1	mA	VDD = 5 V, VO = 2.5 V, No load, Full range	9
Supply current in shutdown per channel	IDD(SHDN)		1		µA	VDD = 5 V, SHDN < 0.7 V, 25°C	9
Supply current in shutdown per channel, full range	IDD(SHDN)			3	µA	VDD = 5 V, SHDN < 0.7 V, Full range	9
Slew rate at unity gain	SR	0.9	1.6		V/µs	VDD = 5 V, VO(PP) = 2 V, CL = 160 pF, RL = 10 kΩ, 25°C	10
Slew rate at unity gain, full range	SR	0.8			V/µs	VDD = 5 V, VO(PP) = 2 V, CL = 160 pF, RL = 10 kΩ, Full range	10

CAD (KiCad official)

Symbol: TLV2463CDGSR
Footprint: Package_SO:MSOP-10_3x3mm_P0.5mm
3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)
3D model files: tlv2463cdgsr-etched.step / tlv2463cdgsr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tlv2463cdgsr.step / tlv2463cdgsr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (76 pp, sha256 8c30ab955a433bf3, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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TLV2463CDGSR

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