MAX3082CSA+T from Maxim Integrated, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RO	output	Receiver output: with RE low, RO is high if A - B ≥ -50mV and low if A - B ≤ -200mV; high impedance when RE is high.
2	RE	input	Receiver output enable: drive low to enable RO, high for high-impedance RO; RE high with DE low enters low-power shutdown.
3	DE	input	Driver output enable: drive high to enable driver outputs, low for high impedance; RE high with DE low enters low-power shutdown.
4	DI	input	Driver input: with DE high, a low forces the noninverting output low and inverting output high, and a high does the opposite.
5	GND	power_in	Ground.
6	A	bidirectional	Noninverting receiver input and noninverting driver output.
7	B	bidirectional	Inverting receiver input and inverting driver output.
8	VCC	power_in	Positive supply, 4.75V ≤ VCC ≤ 5.25V.

Key specifications

Parameter	Value
Manufacturer	Maxim Integrated
Package	SOIC-8
Category	Interface ICs
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply Voltage	VCC			7	V		2
Control Input Voltage (RE, DE)		-0.3			V	-0.3V to (VCC + 0.3V)	2
Driver Input Voltage (DI)		-0.3			V	-0.3V to (VCC + 0.3V)	2
Driver Output Voltage (A, B)		-13		13	V		2
Receiver Input Voltage (A, B)		-13		13	V		2
Receiver Output Voltage (RO)		-0.3			V	-0.3V to (VCC + 0.3V)	2
Operating Temperature Range (MAX308_C_ _)		0		70	°C		2
Storage Temperature Range		-65		150	°C		2
Lead Temperature				300	°C	soldering, 10s	2
Differential Driver Output (no load)	VOD1			5	V	Figure 5	2
Differential Driver Output	VOD2	2			V	Figure 5, R = 50Ω (RS-422)	2
Differential Driver Output	VOD2	1.5			V	Figure 5, R = 27Ω (RS-485)	2
Change in Magnitude of Differential Output Voltage	ΔVOD			0.2	V	Figure 5, R = 50Ω or R = 27Ω (Note 2)	2
Driver Common-Mode Output Voltage	VOC			3	V	Figure 5, R = 50Ω or R = 27Ω	2
Change in Magnitude of Common-Mode Voltage	ΔVOC			0.2	V	Figure 5, R = 50Ω or R = 27Ω (Note 2)	2
Input High Voltage	VIH1	2			V	DE, DI, RE	2
Input Low Voltage	VIL1			0.8	V	DE, DI, RE	2
DI Input Hysteresis	VHYS		100		mV		2
Input Current	IIN1	-2		2	µA	DE, DI, RE	2
Driver Short-Circuit Output Current	IOSD	-250			mA	-7V ≤ VOUT ≤ VCC (Note 4)	2
Driver Short-Circuit Output Current	IOSD			250	mA	0V ≤ VOUT ≤ 12V (Note 4)	2
Driver Short-Circuit Output Current	IOSD	-25		25	mA	0V ≤ VOUT ≤ VCC (Note 4)	2
Three-State Output Current at Receiver	IOZR	-1		1	µA	0V ≤ VRO ≤ VCC	3
Receiver Input Resistance	RIN	96			kΩ	-7V ≤ VCM ≤ +12V	3
Receiver Output Short-Circuit Current	IOSR	-95		95	mA	0V ≤ VRO ≤ VCC (min magnitude ±7)	3
Receiver Differential Threshold Voltage	VTH	-200	-125	-50	mV	-7V ≤ VCM ≤ +12V	3
Receiver Input Hysteresis	ΔVTH		25		mV		3
Receiver Output Low Voltage	VOL			0.4	V	IO = 4mA, VID = -200mV	3
Supply Current	ICC		420	800	µA	No load, RE = DI = GND or VCC, DE = VCC	3
Supply Current	ICC		375	600	µA	No load, RE = DI = GND or VCC, DE = GND	3
Driver Input to Output	tDPLH	500	2030	2600	ns	Figures 7 and 9, RDIFF = 54Ω, CL1 = CL2 = 100pF	4
Driver Output Skew / tDPLH - tDPHL /	tDSKEW		-3	200	ns	Figures 7 and 9, RDIFF = 54Ω, CL1 = CL2 = 100pF	4
Driver Rise or Fall Time	tDR, tDF	667	1320	2500	ns	Figures 7 and 9, RDIFF = 54Ω, CL1 = CL2 = 100pF	4
Driver Enable to Output High	tDZH			3500	ns	Figures 8 and 10, CL = 100pF, S2 closed	4
Driver Enable to Output Low	tDZL			3500	ns	Figures 8 and 10, CL = 100pF, S1 closed	4
Driver Disable Time from Low	tDLZ			100	ns	Figures 8 and 10, CL = 15pF, S1 closed	4
Driver Disable Time from High	tDHZ			100	ns	Figures 8 and 10, CL = 15pF, S2 closed	4
Receiver Input to Output	tRPLH, tRPHL		127	200	ns	Figures 11 and 13; / VID / ≥ 2.0V; rise and fall time of VID ≤ 15ns	4
Differential Receiver Skew / tRPLH - tRPHL /	tRSKD		3	30	ns	Figures 11 and 13; / VID / ≥ 2.0V; rise and fall time of VID ≤ 15ns	4
Receiver Enable to Output Low	tRZL		20	50	ns	Figures 6 and 12, CL = 100pF, S1 closed	4
Receiver Enable to Output High	tRZH		20	50	ns	Figures 6 and 12, CL = 100pF, S2 closed	4
Receiver Disable Time from Low	tRLZ		20	50	ns	Figures 6 and 12, CL = 100pF, S1 closed	4
Receiver Disable Time from High	tRHZ		20	50	ns	Figures 6 and 12, CL = 100pF, S2 closed	4
Maximum Data Rate	fMAX	115			kbps		4

CAD (KiCad official)

Symbol: MAX3082CSA+T
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: max3082csa-t-etched.step / max3082csa-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); max3082csa-t.step / max3082csa-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Maxim Integrated datasheet (21 pp, sha256 a9c4a52e74a57ae9, retrieved 2026-10-31, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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MAX3082CSA+T

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3D Model

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