Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

ATMEGA1608-MFR

Microchip Tech · Microcontroller Units (MCUs/MPUs/SOCs) · VQFN-32-EP(5x5)

ATMEGA1608-MFR from Microchip Tech, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PA3 bidirectional PORTA pin 3 on the VDD domain; alternate functions include TWI SCL (host), USART0 XDIR, TCA0 WO3, TCB1 WO and CCL LUT0 OUT.
2 PA4 bidirectional PORTA pin 4; alternate functions include SPI0 MOSI, USART0 TxD (alternate position) and TCA0 WO4.
3 PA5 bidirectional PORTA pin 5; alternate functions include SPI0 MISO, USART0 RxD (alternate position) and TCA0 WO5.
4 PA6 bidirectional PORTA pin 6; alternate functions include SPI0 SCK, USART0 XCK (alternate position) and LUT0 OUT (alternate position).
5 PA7 bidirectional PORTA pin 7; alternate functions include CLKOUT, AC0 OUT, SPI0 SS, USART0 XDIR (alternate position) and EVOUTA (alternate position).
6 PC0 bidirectional PORTC pin 0; alternate functions include USART1 TxD, TCB2 WO and CCL LUT1 IN0.
7 PC1 bidirectional PORTC pin 1; alternate functions include USART1 RxD, TCB3 WO (alternate position) and CCL LUT1 IN1.
8 PC2 bidirectional PORTC pin 2 with TWI capability; alternate functions include USART1 XCK, TWI0 SDA (host), EVOUTC and LUT1 IN2.
9 PC3 bidirectional PORTC pin 3 with TWI capability; alternate functions include USART1 XDIR, TWI0 SCL (host) and LUT1 OUT.
10 PD0 bidirectional PORTD pin 0 on the AVDD domain; ADC0 input AIN0 and CCL LUT2 IN0.
11 PD1 bidirectional PORTD pin 1 on the AVDD domain; ADC0 input AIN1, AC0 positive input P3 and LUT2 IN1.
12 PD2 bidirectional PORTD pin 2 on the AVDD domain; ADC0 input AIN2, AC0 positive input P0, EVOUTD and LUT2 IN2.
13 PD3 bidirectional PORTD pin 3 on the AVDD domain; ADC0 input AIN3, AC0 negative input N0 and LUT2 OUT.
14 PD4 bidirectional PORTD pin 4 on the AVDD domain; ADC0 input AIN4 and AC0 positive input P1.
15 PD5 bidirectional PORTD pin 5 on the AVDD domain; ADC0 input AIN5 and AC0 negative input N1.
16 PD6 bidirectional PORTD pin 6 on the AVDD domain; ADC0 input AIN6, AC0 positive input P2 and LUT2 OUT (alternate position).
17 PD7 bidirectional PORTD pin 7 on the AVDD domain; external reference VREFA, ADC0 input AIN7, AC0 negative input N2 and EVOUTD (alternate position).
18 AVDD power_in Analog supply input powering the AVDD-domain pins (PORTD).
19 GND power_in Ground.
20 PF0 bidirectional PORTF pin 0; crystal pin TOSC1, USART2 TxD and CCL LUT3 IN0.
21 PF1 bidirectional PORTF pin 1; crystal pin TOSC2, USART2 RxD and CCL LUT3 IN1.
22 PF2 bidirectional PORTF pin 2 with TWI capability; ADC0 input AIN12, USART2 XCK, TWI0 SDA (client), EVOUTF and LUT3 IN2.
23 PF3 bidirectional PORTF pin 3 with TWI capability; ADC0 input AIN13, USART2 XDIR, TWI0 SCL (client) and LUT3 OUT.
24 PF4 bidirectional PORTF pin 4; ADC0 input AIN14, USART2 TxD (alternate position), TCA0 WO4 and TCB0 WO (alternate position).
25 PF5 bidirectional PORTF pin 5; ADC0 input AIN15, USART2 RxD (alternate position), TCA0 WO5 and TCB1 WO (alternate position).
26 PF6/RESET bidirectional PORTF pin 6, configured as the RESET pin by fuse (RSTPINCFG) or usable as GPIO; also USART2 XCK (alternate position).
27 UPDI bidirectional Unified Program and Debug Interface pin used for programming and debugging.
28 VDD power_in Digital supply input; device operates from 1.8V to 5.5V.
29 GND power_in Ground.
30 PA0 bidirectional PORTA pin 0; external clock input EXTCLK, USART0 TxD, TCA0 WO0 and CCL LUT0 IN0.
31 PA1 bidirectional PORTA pin 1; USART0 RxD, TCA0 WO1 and CCL LUT0 IN1.
32 PA2 bidirectional PORTA pin 2 with TWI capability; USART0 XCK, TWI0 SDA (host), TCA0 WO2, TCB0 WO, EVOUTA and LUT0 IN2.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-32-EP(5x5)
Category Single Chip Microcomputer/Microcontroller
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VDD 1.8 5.5 V Ordering information, ATmega1608-MFR 520
Temperature Range -40 125 °C Ordering information, ATmega1608-MFR 520
Max. CPU Speed 20 MHz Ordering information, ATmega1608-MFR 520

CAD (KiCad official)

  • Symbol: ATMEGA1608-MFR
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: atmega1608-mfr-etched.step / atmega1608-mfr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega1608-mfr.step / atmega1608-mfr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (552 pp, sha256 e4bbeee766cda6b4, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF