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Contents

README

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STM32F303K6T6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)

STM32F303K6T6 from STMicroelectronics, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD power_in Digital power supply for the device (VDD and VDDA range 2.0 to 3.6 V per the features list).
2 PF0 / OSC_IN bidirectional 5 V tolerant (FT) I/O with TIM1_CH3N alternate function; also serves as the OSC_IN input for the external oscillator.
3 PF1 / OSC_OUT bidirectional 5 V tolerant (FT) I/O; also serves as the OSC_OUT output for the external oscillator.
4 NRST bidirectional Bi-directional device reset input / internal reset output (active low) with embedded weak pull-up resistor.
5 VDDA/VREF+ power_in Analog power supply and positive reference voltage for the ADC, DAC, comparators and op-amp (VDDA 2.0 to 3.6 V per the features list).
6 PA0 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa); alternates TIM2_CH1/TIM2_ETR, TSC_G1_IO1, USART2_CTS, EVENTOUT; additional ADC1_IN1 (fast channel), RTC_TAMP2/WKUP1.
7 PA1 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa); alternates TIM2_CH2, TSC_G1_IO2, USART2_RTS_DE, TIM15_CH1N, EVENTOUT; additional ADC1_IN2 (fast channel), RTC_REFIN.
8 PA2 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa); alternates TIM2_CH3, TSC_G1_IO3, USART2_TX, COMP2_OUT, TIM15_CH1, EVENTOUT; additional ADC1_IN3 (fast channel), COMP2_INM.
9 PA3 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa); alternates TIM2_CH4, TSC_G1_IO4, USART2_RX, TIM15_CH2, EVENTOUT; additional ADC1_IN4 (fast channel).
10 PA4 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa) with reduced touch sensing sensitivity (sampling capacitor I/O recommended); alternates TIM3_CH2, TSC_G2_IO1, SPI1_NSS, USART2_CK, EVENTOUT; additional ADC2_IN1 (fast channel), DAC1_OUT1, COMP2_INM, COMP4_INM, COMP6_INM.
11 PA5 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa) with reduced touch sensing sensitivity; alternates TIM2_CH1/TIM2_ETR, TSC_G2_IO2, SPI1_SCK, EVENTOUT; additional ADC2_IN2 (fast channel), DAC1_OUT2, OPAMP2_VINM.
12 PA6 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa) with reduced touch sensing sensitivity; alternates TIM16_CH1, TIM3_CH1, TSC_G2_IO3, SPI1_MISO, TIM1_BKIN, EVENTOUT; additional ADC2_IN3 (fast channel), DAC2_OUT1, OPAMP2_VOUT.
13 PA7 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa); alternates TIM17_CH1, TIM3_CH2, TSC_G2_IO4, SPI1_MOSI, TIM1_CH1N, EVENTOUT; additional ADC2_IN4 (fast channel), COMP2_INP, OPAMP2_VINP.
14 PB0 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa); alternates TIM3_CH3, TSC_G3_IO2, TIM1_CH2N, EVENTOUT; additional ADC1_IN11, COMP4_INP, OPAMP2_VINP.
15 PB1 bidirectional 3.3 V tolerant I/O directly connected to ADC (TTa); alternates TIM3_CH4, TSC_G3_IO3, TIM1_CH3N, COMP4_OUT, EVENTOUT; additional ADC1_IN12.
16 VSS power_in Digital ground.
17 VDD power_in Digital power supply.
18 PA8 bidirectional 5 V tolerant (FT) I/O; alternates MCO, TIM1_CH1, USART1_CK, EVENTOUT.
19 PA9 bidirectional 5 V tolerant (FT) I/O; alternates TSC_G4_IO1, TIM1_CH2, USART1_TX, TIM15_BKIN, TIM2_CH3, EVENTOUT.
20 PA10 bidirectional 5 V tolerant (FT) I/O; alternates TIM17_BKIN, TSC_G4_IO2, TIM1_CH3, USART1_RX, COMP6_OUT, TIM2_CH4, EVENTOUT.
21 PA11 bidirectional 5 V tolerant (FT) I/O; alternates TIM1_CH1N, USART1_CTS, CAN_RX, TIM1_CH4, TIM1_BKIN2, EVENTOUT.
22 PA12 bidirectional 5 V tolerant (FT) I/O; alternates TIM16_CH1, TIM1_CH2N, USART1_RTS_DE, COMP2_OUT, CAN_TX, TIM1_ETR, EVENTOUT.
23 PA13 bidirectional 5 V tolerant (FT) I/O; default function JTMS/SWDAT, also TIM16_CH1N, TSC_G4_IO3, IR_OUT, USART3_CTS, EVENTOUT.
24 PA14 bidirectional 5 V tolerant I/O with FM+ capability (FTf); default function JTCK/SWCLK, also TSC_G4_IO4, I2C1_SDA, TIM1_BKIN, USART2_TX, EVENTOUT.
25 PA15 bidirectional 5 V tolerant I/O with FM+ capability (FTf); default function JTDI, also TIM2_CH1/TIM2_ETR, TSC_SYNC, I2C1_SCL, SPI1_NSS, USART2_RX, TIM1_BKIN, EVENTOUT.
26 PB3 bidirectional 5 V tolerant (FT) I/O; default function JTDO/TRACESWO, also TIM2_CH2, TSC_G5_IO1, SPI1_SCK, USART2_TX, TIM3_ETR, EVENTOUT.
27 PB4 bidirectional 5 V tolerant (FT) I/O; default function NJTRST, also TIM16_CH1, TIM3_CH1, TSC_G5_IO2, SPI1_MISO, USART2_RX, TIM17_BKIN, EVENTOUT.
28 PB5 bidirectional 5 V tolerant (FT) I/O; alternates TIM16_BKIN, TIM3_CH2, I2C1_SMBA, SPI1_MOSI, USART2_CK, TIM17_CH1, EVENTOUT.
29 PB6 bidirectional 5 V tolerant I/O with FM+ capability (FTf); alternates TIM16_CH1N, TSC_G5_IO3, I2C1_SCL, USART1_TX, EVENTOUT.
30 PB7 bidirectional 5 V tolerant I/O with FM+ capability (FTf); alternates TIM17_CH1N, TSC_G5_IO4, I2C1_SDA, USART1_RX, TIM3_CH4, EVENTOUT.
31 BOOT0 input Dedicated BOOT0 pin used to select the boot configuration.
32 VSS power_in Digital ground.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-32(7x7)
Category Embedded Processors & Controllers
Pins 32

CAD (KiCad official)

  • Symbol: STM32F303K6T6
  • Footprint: Package_QFP:LQFP-32_7x7mm_P0.8mm
  • 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
  • 3D model files: stm32f303k6t6-etched.step / stm32f303k6t6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f303k6t6.step / stm32f303k6t6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (124 pp, sha256 a2ef8412ae529745, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF