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Contents

README

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ATMEGA328P-MU

Microchip Tech · Microcontrollers (MCU/MPU/SOC) · VQFN-32(5x5)

ATMEGA328P-MU from Microchip Tech, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PD3 bidirectional Port D bit 3, bi-directional I/O with internal pull-up, also INT1 external interrupt 1, OC2B Timer/Counter2 output, and PCINT19.
2 PD4 bidirectional Port D bit 4, bi-directional I/O with internal pull-up, also XCK USART external clock, T0 Timer/Counter0 external counter input, and PCINT20.
3 GND power_in Ground.
4 VCC power_in Digital supply voltage; the datasheet lists the operating voltage as 1.8 to 5.5 V.
5 GND power_in Ground.
6 VCC power_in Digital supply voltage; the datasheet lists the operating voltage as 1.8 to 5.5 V.
7 PB6 bidirectional Port B bit 6, bi-directional I/O with internal pull-up, used as XTAL1/TOSC1 clock input to the inverting oscillator amplifier (or external clock input) depending on fuse settings, also PCINT6.
8 PB7 bidirectional Port B bit 7, bi-directional I/O with internal pull-up, used as XTAL2/TOSC2 output of the inverting oscillator amplifier depending on fuse settings, also PCINT7.
9 PD5 bidirectional Port D bit 5, bi-directional I/O with internal pull-up, also T1 Timer/Counter1 external counter input, OC0B output, and PCINT21.
10 PD6 bidirectional Port D bit 6, bi-directional I/O with internal pull-up, also AIN0 analog comparator positive input, OC0A output, and PCINT22.
11 PD7 bidirectional Port D bit 7, bi-directional I/O with internal pull-up, also AIN1 analog comparator negative input and PCINT23.
12 PB0 bidirectional Port B bit 0, bi-directional I/O with internal pull-up, also ICP1 input capture input, CLKO divided system clock output, and PCINT0.
13 PB1 bidirectional Port B bit 1, bi-directional I/O with internal pull-up, also OC1A Timer/Counter1 output compare A output and PCINT1.
14 PB2 bidirectional Port B bit 2, bi-directional I/O with internal pull-up, also SS SPI slave select, OC1B output compare B output, and PCINT2.
15 PB3 bidirectional Port B bit 3, bi-directional I/O with internal pull-up, also MOSI SPI data line, OC2A output compare A output, and PCINT3.
16 PB4 bidirectional Port B bit 4, bi-directional I/O with internal pull-up, also MISO SPI data line and PCINT4.
17 PB5 bidirectional Port B bit 5, bi-directional I/O with internal pull-up, also SCK SPI clock and PCINT5.
18 AVCC power_in Supply voltage pin for the A/D converter, PC3:0 and ADC7:6, which should be connected to VCC even if the ADC is not used and through a low-pass filter if it is.
19 ADC6 input Analog input channel 6 of the 10-bit ADC, powered from the analog supply (TQFP and VQFN packages only).
20 AREF input Analog reference pin for the A/D converter.
21 GND power_in Ground.
22 ADC7 input Analog input channel 7 of the 10-bit ADC, powered from the analog supply (TQFP and VQFN packages only).
23 PC0 bidirectional Port C bit 0, 7-bit bi-directional I/O with internal pull-up, also ADC0 analog input channel 0 (uses analog power) and PCINT8.
24 PC1 bidirectional Port C bit 1, bi-directional I/O with internal pull-up, also ADC1 analog input channel 1 (uses analog power) and PCINT9.
25 PC2 bidirectional Port C bit 2, bi-directional I/O with internal pull-up, also ADC2 analog input channel 2 (uses analog power) and PCINT10.
26 PC3 bidirectional Port C bit 3, bi-directional I/O with internal pull-up, also ADC3 analog input channel 3 (uses analog power) and PCINT11.
27 PC4 bidirectional Port C bit 4, bi-directional I/O with internal pull-up, also SDA 2-wire serial data I/O, ADC4 analog input channel 4 (uses digital power), and PCINT12.
28 PC5 bidirectional Port C bit 5, bi-directional I/O with internal pull-up, also SCL 2-wire serial clock I/O, ADC5 analog input channel 5 (uses digital power), and PCINT13.
29 PC6 bidirectional Port C bit 6, which is a Reset input when the RSTDISBL fuse is unprogrammed (a low level longer than the minimum pulse length generates a reset) and a normal I/O pin when the fuse is programmed; also PCINT14.
30 PD0 bidirectional Port D bit 0, bi-directional I/O with internal pull-up, also RXD USART receive data input and PCINT16.
31 PD1 bidirectional Port D bit 1, bi-directional I/O with internal pull-up, also TXD USART transmit data output and PCINT17.
32 PD2 bidirectional Port D bit 2, bi-directional I/O with internal pull-up, also INT0 external interrupt 0 input and PCINT18.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Microchip Tech
Package VQFN-32(5x5)
Category Embedded Processors & Controllers
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power Supply Current, Active mode ICC 0.3 0.5 mA Active 1MHz, VCC = 2V 312
Power Supply Current, Active mode ICC 1.7 2.5 mA Active 4MHz, VCC = 3V 312
Power Supply Current, Active mode ICC 5.2 9 mA Active 8MHz, VCC = 5V 312
Power Supply Current, Idle mode ICC 0.04 0.15 mA Idle 1MHz, VCC = 2V 312
Power Supply Current, Idle mode ICC 0.3 0.7 mA Idle 4MHz, VCC = 3V 312
Power Supply Current, Idle mode ICC 1.2 2.7 mA Idle 8MHz, VCC = 5V 312
Power Supply Current, Power-down mode, WDT enabled ICC 4.2 8 µA WDT enabled, VCC = 3V 312
Power Supply Current, Power-down mode, WDT disabled ICC 0.1 2 µA WDT disabled, VCC = 3V 312
Power Supply Current, Power-save mode ICC 0.8 µA 32kHz TOSC enabled, VCC = 1.8V 312
Power Supply Current, Power-save mode ICC 0.9 µA 32kHz TOSC enabled, VCC = 3V 312
Voltage on RESET with respect to Ground -0.5 13 V 308
Voltage on any pin except RESET with respect to Ground -0.5 V Printed as VCC+0.5V 308
DC Current per I/O Pin 40 mA 308
DC Current VCC and GND Pins 200 mA 308
Storage Temperature -65 150 °C 308
Operating Temperature -55 125 °C 308
Supply voltage (VCC) VCC 1.8 5.5 V TA = -40C to 85C 308
Ambient operating temperature (Industrial) TA -40 85 °C Industrial range, ATmega328P-MU ordering code 635
Maximum frequency (speed grade) 20 MHz Speed grade on ordering table for ATmega328P-MU; frequency depends on VCC per Figure 29-1 635

CAD (KiCad official)

  • Symbol: ATMEGA328P-MU
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: atmega328p-mu-etched.step / atmega328p-mu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); atmega328p-mu.step / atmega328p-mu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Microchip Tech datasheet (653 pp, sha256 b26db583d1d0520c, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF