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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

SN65LBC175DR

Texas Instruments · RS-485 / RS-422 ICs · SOIC-16

SN65LBC175DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1B	input	Channel 1 inverting differential input, with a common-mode range of −7 V to 12 V and an absolute maximum input voltage of ±25 V.
2	1A	input	Channel 1 non-inverting differential input, with ±200 mV input sensitivity over the −7 V to 12 V common-mode range.
3	1Y	output	Channel 1 receiver output, high when VID ≥ 0.2 V, low when VID ≤ −0.2 V, and high-impedance when the enable is low.
4	1,2 EN	input	Active-high enable shared by receivers 1 and 2, with a high-level input of at least 2 V and a low-level input of at most 0.8 V.
5	2Y	output	Channel 2 receiver output, high when VID ≥ 0.2 V, low when VID ≤ −0.2 V, and high-impedance when the enable is low.
6	2A	input	Channel 2 non-inverting differential input, with ±200 mV input sensitivity over the −7 V to 12 V common-mode range.
7	2B	input	Channel 2 inverting differential input, with a common-mode range of −7 V to 12 V and an absolute maximum input voltage of ±25 V.
8	GND	power_in	Device ground; all voltages in the datasheet are referenced to this pin.
9	3B	input	Channel 3 inverting differential input, with a common-mode range of −7 V to 12 V and an absolute maximum input voltage of ±25 V.
10	3A	input	Channel 3 non-inverting differential input, with ±200 mV input sensitivity over the −7 V to 12 V common-mode range.
11	3Y	output	Channel 3 receiver output, high when VID ≥ 0.2 V, low when VID ≤ −0.2 V, and high-impedance when the enable is low.
12	3,4 EN	input	Active-high enable shared by receivers 3 and 4, with a high-level input of at least 2 V and a low-level input of at most 0.8 V.
13	4Y	output	Channel 4 receiver output, high when VID ≥ 0.2 V, low when VID ≤ −0.2 V, and high-impedance when the enable is low.
14	4A	input	Channel 4 non-inverting differential input, with ±200 mV input sensitivity over the −7 V to 12 V common-mode range.
15	4B	input	Channel 4 inverting differential input, with a common-mode range of −7 V to 12 V and an absolute maximum input voltage of ±25 V.
16	VCC	power_in	Device supply, recommended 4.75 V to 5.25 V with 5 V nominal, absolute maximum −0.3 V to 7 V.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-16
Category	Interface
Pins	16

CAD (KiCad official)

Symbol: SN65LBC175DR
Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
3D model: SOIC-16 (KiCad packages3D, STEP)
3D model files: sn65lbc175dr-etched.step / sn65lbc175dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn65lbc175dr.step / sn65lbc175dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (23 pp, sha256 9a691934b5ba5164, retrieved 2026-10-11, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF