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CY95F698KPMC1-G-UNE2

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Cypress Semicon CYPRESS, LQFP-52(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentembedded processors & controllerscy95f698kpmc1-g-une2factory-2.0.0extractor-text
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CY95F698KPMC1-G-UNE2

Cypress Semicon · CYPRESS · LQFP-52(10x10)

CY95F698KPMC1-G-UNE2 from Cypress Semicon, in a LQFP-52(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PG2/X1A/SNI2 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) that also serves as subclock I/O oscillation pin X1A and MPG waveform sequencer position-detection trigger input SNI2.
2 PG1/X0A/SNI1 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) that also serves as subclock input oscillation pin X0A and MPG waveform sequencer position-detection trigger input SNI1.
3 VCC power_in Power supply pin; recommended operating range is 2.88 V to 5.5 V.
4 C passive Decoupling capacitor connection pin; use a ceramic capacitor of 0.022 µF to 1 µF to VSS, at least as large as the decoupling capacitor on VCC.
5 P40/AN08 bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with 8/10-bit A/D converter analog input AN08.
6 P41/AN09 bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with 8/10-bit A/D converter analog input AN09.
7 NC unconnected Internally connected pin; always leave it unconnected.
8 P42/AN10 bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with 8/10-bit A/D converter analog input AN10.
9 P43/AN11 bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with 8/10-bit A/D converter analog input AN11.
10 P44/TO1 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 16-bit reload timer ch. 1 output TO1.
11 P45/SCK bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with LIN-UART clock I/O SCK.
12 P46/SOT bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with LIN-UART data output SOT.
13 P47/SIN bidirectional General-purpose I/O port (CMOS input, CMOS output, pull-up) with LIN-UART data input SIN.
14 P10/PPG10 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 8/16-bit PPG ch. 1 output PPG10.
15 P11/PPG11 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 8/16-bit PPG ch. 1 output PPG11.
16 P12/DBG bidirectional General-purpose I/O port (hysteresis input, N-ch open drain output, no pull-up) that is also the DBG input pin; connect an external pull-up of 2 kΩ or above.
17 P13/PPG00 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 8/16-bit PPG ch. 0 output PPG00.
18 P14/PPG01 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 8/16-bit PPG ch. 0 output PPG01.
19 P15/PPG20 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 8/16-bit PPG ch. 2 output PPG20.
20 NC unconnected Internally connected pin; always leave it unconnected.
21 P16/PPG21 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 8/16-bit PPG ch. 2 output PPG21.
22 P17/SNI0 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with MPG waveform sequencer position-detection trigger input SNI0.
23 P70/TO00 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 8/16-bit composite timer ch. 0 output TO00.
24 P71/TO01 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 8/16-bit composite timer ch. 0 output TO01.
25 P72/SCL bidirectional General-purpose I/O port (CMOS input, N-ch open drain output, no pull-up) with I2C bus interface ch. 0 clock I/O SCL.
26 P73/SDA bidirectional General-purpose I/O port (CMOS input, N-ch open drain output, no pull-up) with I2C bus interface ch. 0 data I/O SDA.
27 P74/EC0 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with 8/16-bit composite timer ch. 0 clock input EC0.
28 P75/UCK0 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with UART/SIO ch. 0 clock I/O UCK0.
29 P76/UO0 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with UART/SIO ch. 0 data output UO0.
30 P77/UI0 bidirectional General-purpose I/O port (hysteresis input, CMOS output, pull-up) with UART/SIO ch. 0 data input UI0.
31 P60/DTTI bidirectional High-current (8 mA/12 mA) general-purpose I/O port (hysteresis input, CMOS output, pull-up) with MPG waveform sequencer input DTTI.
32 P61/TI1 bidirectional High-current (8 mA/12 mA) general-purpose I/O port (hysteresis input, CMOS output, pull-up) with 16-bit reload timer ch. 1 input TI1.
33 NC unconnected Internally connected pin; always leave it unconnected.
34 P62/OPT0/PPG00/TO10 bidirectional High-current general-purpose I/O port (hysteresis input, CMOS output, pull-up) with MPG output OPT0, 8/16-bit PPG ch. 0 output PPG00 and composite timer ch. 1 output TO10.
35 P63/OPT1/PPG01/TO11 bidirectional High-current general-purpose I/O port (hysteresis input, CMOS output, pull-up) with MPG output OPT1, 8/16-bit PPG ch. 0 output PPG01 and composite timer ch. 1 output TO11.
36 P64/OPT2/PPG10/EC1 bidirectional High-current general-purpose I/O port (hysteresis input, CMOS output, pull-up) with MPG output OPT2, 8/16-bit PPG ch. 1 output PPG10 and composite timer ch. 1 clock input EC1.
37 P65/OPT3/PPG11 bidirectional High-current general-purpose I/O port (hysteresis input, CMOS output, pull-up) with MPG output OPT3 and 8/16-bit PPG ch. 1 output PPG11.
38 P66/OPT4/PPG20/PPG1 bidirectional High-current general-purpose I/O port (hysteresis input, CMOS output, pull-up) with MPG output OPT4, 8/16-bit PPG ch. 2 output PPG20 and 16-bit PPG timer ch. 1 output PPG1.
39 P67/OPT5/PPG21/TRG1 bidirectional High-current general-purpose I/O port (hysteresis input, CMOS output, pull-up) with MPG output OPT5, 8/16-bit PPG ch. 2 output PPG21 and 16-bit PPG timer ch. 1 trigger input TRG1.
40 P00/INT00/AN00/CMP0_P bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with external interrupt INT00, A/D input AN00 and comparator ch. 0 non-inverting input CMP0_P.
41 P01/INT01/AN01/CMP0_N bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with external interrupt INT01, A/D input AN01 and comparator ch. 0 inverting input CMP0_N.
42 P02/INT02/AN02/CMP0_O bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with external interrupt INT02, A/D input AN02 and comparator ch. 0 digital output CMP0_O.
43 P03/INT03/AN03/CMP1_P bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with external interrupt INT03, A/D input AN03 and comparator ch. 1 non-inverting input CMP1_P.
44 P04/INT04/AN04/CMP1_N bidirectional General-purpose I/O port (CMOS/analog input, CMOS output, pull-up) with external interrupt INT04, A/D input AN04 and comparator ch. 1 inverting input CMP1_N.
45 P05/INT05/AN05/CMP1_O bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with external interrupt INT05, A/D input AN05 and comparator ch. 1 digital output CMP1_O.
46 NC unconnected Internally connected pin; always leave it unconnected.
47 P06/INT06/AN06 bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with external interrupt INT06 and A/D converter input AN06.
48 P07/INT07/AN07 bidirectional General-purpose I/O port (hysteresis/analog input, CMOS output, pull-up) with external interrupt INT07 and A/D converter input AN07.
49 PF2/RST bidirectional General-purpose I/O port (hysteresis input, N-ch open drain output) that is also the reset pin RST; connect an external pull-up of 2 kΩ or above.
50 PF0/X0 bidirectional General-purpose I/O port (hysteresis input, CMOS output) that is also the main clock input oscillation pin X0.
51 PF1/X1 bidirectional General-purpose I/O port (hysteresis input, CMOS output) that is also the main clock I/O oscillation pin X1.
52 VSS power_in Power supply pin (GND).

Key specifications

Parameter Value
Manufacturer Cypress Semicon
Package LQFP-52(10x10)
Category Embedded Processors & Controllers
Pins 52

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply voltage VCC 2.88 5.5 V VSS = 0.0 V 87
Decoupling capacitor CS 0.022 1 µF 87
Operating temperature TA -40 85 °C Other than on-chip debug mode 87
Operating temperature (on-chip debug) TA 5 35 °C On-chip debug mode 87
Power supply voltage VCC -0.3 6 V VSS − 0.3 to VSS + 6 85
Input voltage VI -0.3 6 V VSS − 0.3 to VSS + 6 85
Output voltage VO -0.3 6 V VSS − 0.3 to VSS + 6 85
Maximum clamp current ICLAMP -2 2 mA Applicable to specific pins 85
Total maximum clamp current Σ/ICLAMP/ 20 mA Applicable to specific pins 85
L level maximum output current IOL 15 mA 85
L level average current IOLAV1 4 mA Other than P60 to P67 85
L level average current IOLAV2 12 mA P60 to P67 85
L level total maximum output current ΣIOL 100 mA 85
L level total average output current ΣIOLAV 37 mA 85
H level maximum output current IOH -15 mA 85
H level average current IOHAV1 -4 mA Other than P60 to P67 85
H level average current IOHAV2 -8 mA P60 to P67 85
H level total maximum output current ΣIOH -100 mA 85
H level total average output current ΣIOHAV -47 mA 85
Power consumption Pd 320 mW 85
Operating temperature TA -40 85 °C 85
Storage temperature Tstg -55 150 °C 85
H level input voltage (CMOS) VIHI 0.7 V P47, P72, P73, P77; min is 0.7 VCC, max VCC + 0.3 V; VCC = 5.0 V±10% 88
H level input voltage (hysteresis) VIHS 0.8 V Other than P47, P72, P73, P77, PF2; min is 0.8 VCC, max VCC + 0.3 V 88
L level input voltage (CMOS) VILI -0.3 0.3 V P47, P72, P73, P77; VSS − 0.3 to 0.3 VCC 88
L level input voltage (hysteresis) VILS -0.3 0.2 V Other than P47, P72, P73, P77, PF2; max is 0.2 VCC 88
H level output voltage VOH1 -0.5 V IOH = −4 mA; min is VCC − 0.5 88
L level output voltage VOL1 0.4 V IOL = 4 mA 88
Input leak current ILI -5 5 µA 0.0 V < VI < VCC 88
Internal pull-up resistor RPULL 25 50 100 kΩ VI = 0 V 88
Input capacitance CIN 5 15 pF f = 1 MHz 88
Power supply current ICC 4.9 5.8 mA FCH = 32 MHz, FMP = 16 MHz, main clock mode (divided by 2), except during Flash programming/erasing 89
Power supply current, sleep ICCS 2 3 mA FCH = 32 MHz, FMP = 16 MHz, main sleep mode 89
Power supply current, subclock ICCL 75.9 145 µA FCL = 32 kHz, TA = +25 °C 89
Power supply current, watch ICCT 11 13 µA Watch mode, TA = +25 °C, deep standby 89
Main CR clock frequency FCRH 3.92 4 4.08 MHz 0 °C ≤ TA ≤ +70 °C 91
Sub-CR clock frequency FCRL 50 100 150 kHz When the sub-CR clock is used 91
Comparator offset voltage -15 15 mV 109
BGR output voltage VBGR 1.1495 1.21 1.2705 V 109
A/D total error -3 3 LSB VCC = 2.7 V to 5.5 V 110
A/D linearity error -2.5 2.5 LSB VCC = 2.7 V to 5.5 V 110
A/D differential linearity error -1.9 1.9 LSB VCC = 2.7 V to 5.5 V 110
Flash program/erase cycle 100000 cycle 114
Flash power supply voltage at program/erase 2.4 5.5 V 114

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin • Lead-Free Packaging CAUTION: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic soldering, 26

CAD (KiCad official)

  • Symbol: CY95F698KPMC1-G-UNE2
  • Footprint: Package_QFP:LQFP-52_10x10mm_P0.65mm
  • 3D model: LQFP-52(10x10) (KiCad packages3D, STEP)
  • 3D model files: cy95f698kpmc1-g-une2-etched.step / cy95f698kpmc1-g-une2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); cy95f698kpmc1-g-une2.step / cy95f698kpmc1-g-une2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Cypress Semicon datasheet (130 pp, sha256 c262b872ad46f6e0, retrieved 2026-10-27, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF