component

SZSL05T1G

Public Made by Adom

by adom

onsemi TVS, SOT-23-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttvs-fuse-board level protectionszsl05t1gfactory-2.0.0extractor-text
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Contents

README

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SZSL05T1G

onsemi · TVS · SOT-23-3

SZSL05T1G from onsemi, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CATHODE passive Cathode of the 5.0 V VRWM surge protection diode (Style 26), connected to the protected line; VBR 6.0 V min to 8.0 V max @ 1 mA, 300 W peak power (8x20 us).
2 ANODE passive Anode of the surge protection diode (Style 26), connected to ground; clamps to 11 V max @ 1 A and 17 V max @ 5 A with 5.0 pF max capacitance.
3 NC unconnected No connection (Style 26, shown as 3 (NC) on the package diagram).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-23-3
Category TVS/Fuse/Board Level Protection
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Working Peak Reverse Voltage VRWM 5 V SL05 2
Maximum Reverse Leakage Current IR 20 µA @ VRWM 2
Breakdown Voltage VBR 6 8 V @ 1 mA, TA = 25°C 2
Clamping Voltage @ 1 A VC 9.8 V @ 1 A, 8x20 µs waveform 2
Clamping Voltage @ 5 A VC 11 V @ 5 A, 8x20 µs waveform 2
Maximum Reverse Peak Pulse Current IPP 17 A Surge waveform per Figure 2 2
Capacitance C 3.5 5 pF @ VR = 0 V, 1 MHz 2
Peak Power Dissipation Ppk 300 W 8x20 µs, TL ≤ 25°C 2
IEC 61000-4-2 Contact Discharge Vpp -8 8 kV IEC 61000-4-2 Level 4 2
IEC 61000-4-2 Air Discharge Vpp -16 16 kV IEC 61000-4-2 Level 4 2
IEC 61000-4-4 EFT Vpp 40 A IEC 61000-4-4 2
IEC 61000-4-5 Lightning Vpp 12 A IEC 61000-4-5 2
Total Power Dissipation on FR-5 Board PD 225 mW TA = 25°C 2
Derating above 25°C (FR-5) PD derate 1.8 mW/°C Derate above 25°C, FR-5 2
Thermal Resistance Junction to Ambient (FR-5) RθJA 556 °C/W FR-5 board 2
Total Power Dissipation on Alumina Substrate PD 300 mW TA = 25°C 2
Derating above 25°C (Alumina) PD derate 2.4 mW/°C Derate above 25°C, alumina 2
Thermal Resistance Junction-to-Ambient (Alumina) RθJA 417 °C/W Alumina substrate 2
Junction and Storage Temperature Range TJ, Tstg -55 150 °C 2
Lead Solder Temperature - Maximum TL 260 °C 10 second duration 2

CAD (KiCad official)

  • Symbol: SZSL05T1G
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3 (KiCad packages3D, STEP)
  • 3D model files: szsl05t1g-etched.step / szsl05t1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); szsl05t1g.step / szsl05t1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (6 pp, sha256 f1cb1b132892bea7, retrieved 2026-10-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF