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Contents

README

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MC14584BDG

onsemi · Inverters · SOIC-14

MC14584BDG from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN 1 input Schmitt-trigger inverter 1 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD.
2 OUT 1 output Schmitt-trigger inverter 1 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open.
3 IN 2 input Schmitt-trigger inverter 2 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD.
4 OUT 2 output Schmitt-trigger inverter 2 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open.
5 IN 3 input Schmitt-trigger inverter 3 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD.
6 OUT 3 output Schmitt-trigger inverter 3 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open.
7 VSS power_in Negative supply and reference ground; all voltages in the datasheet are referenced to VSS.
8 OUT 4 output Schmitt-trigger inverter 4 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open.
9 IN 4 input Schmitt-trigger inverter 4 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD.
10 OUT 5 output Schmitt-trigger inverter 5 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open.
11 IN 5 input Schmitt-trigger inverter 5 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD.
12 OUT 6 output Schmitt-trigger inverter 6 output; the device is capable of driving two low-power TTL loads over the rated temperature range, and unused outputs must be left open.
13 IN 6 input Schmitt-trigger inverter 6 input; Vin must be constrained to the range VSS to VDD, and unused inputs must be tied to VSS or VDD.
14 VDD power_in Positive supply; the datasheet gives a supply range of 3.0 Vdc to 18 Vdc, with an absolute maximum of +18.0 V referenced to VSS.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
DC Supply Voltage Range VDD -0.5 18 V Voltages referenced to VSS 1
Input or Output Voltage Range (DC or Transient) Vin, Vout -0.5 V DC or transient; maximum printed as VDD + 0.5 1
Input or Output Current (DC or Transient) per Pin Iin, Iout -10 10 mA DC or transient, per pin; printed as ±10 mA 1
Power Dissipation, per Package PD 500 mW Per package (Note 1) 1
Ambient Temperature Range TA -55 125 °C 1
Storage Temperature Range Tstg -65 150 °C 1
Lead Temperature TL 260 °C 8-second soldering 1
Input Current Iin -0.1 0.1 Adc VDD = 15 Vdc; TA = -55°C 3
Input Current Iin -0.1 1e-05 0.1 Adc VDD = 15 Vdc; TA = 25°C 3
Input Current Iin -1 1 Adc VDD = 15 Vdc; TA = 125°C 3
Input Capacitance Cin 5 7.5 pF Vin = 0; TA = 25°C 3
Quiescent Current (Per Package) IDD 0.25 Adc VDD = 5.0 Vdc; TA = -55°C 3
Quiescent Current (Per Package) IDD 0.5 Adc VDD = 10 Vdc; TA = -55°C 3
Quiescent Current (Per Package) IDD 1 Adc VDD = 15 Vdc; TA = -55°C 3
Quiescent Current (Per Package) IDD 0.0005 0.25 Adc VDD = 5.0 Vdc; TA = 25°C 3
Quiescent Current (Per Package) IDD 0.001 0.5 Adc VDD = 10 Vdc; TA = 25°C 3
Quiescent Current (Per Package) IDD 0.0015 1 Adc VDD = 15 Vdc; TA = 25°C 3
Quiescent Current (Per Package) IDD 7.5 Adc VDD = 5.0 Vdc; TA = 125°C 3
Quiescent Current (Per Package) IDD 15 Adc VDD = 10 Vdc; TA = 125°C 3
Quiescent Current (Per Package) IDD 30 Adc VDD = 15 Vdc; TA = 125°C 3
Output Rise Time tTLH 100 200 ns CL = 50 pF; VDD = 5.0 Vdc; TA = 25°C 3
Output Rise Time tTLH 50 100 ns CL = 50 pF; VDD = 10 Vdc; TA = 25°C 3
Output Rise Time tTLH 40 80 ns CL = 50 pF; VDD = 15 Vdc; TA = 25°C 3
Output Fall Time tTHL 100 200 ns CL = 50 pF; VDD = 5.0 Vdc; TA = 25°C 3
Output Fall Time tTHL 50 100 ns CL = 50 pF; VDD = 10 Vdc; TA = 25°C 3
Output Fall Time tTHL 40 80 ns CL = 50 pF; VDD = 15 Vdc; TA = 25°C 3
Propagation Delay Time tPLH, tPHL 125 250 ns CL = 50 pF; VDD = 5.0 Vdc; TA = 25°C 3
Propagation Delay Time tPLH, tPHL 50 100 ns CL = 50 pF; VDD = 10 Vdc; TA = 25°C 3
Propagation Delay Time tPLH, tPHL 40 80 ns CL = 50 pF; VDD = 15 Vdc; TA = 25°C 3
Threshold Voltage Positive-Going VT+ 1.9 3.5 Vdc VDD = 5.0 Vdc; TA = -55°C 3
Threshold Voltage Positive-Going VT+ 3.4 7 Vdc VDD = 10 Vdc; TA = -55°C 3
Threshold Voltage Positive-Going VT+ 5.2 10.6 Vdc VDD = 15 Vdc; TA = -55°C 3
Threshold Voltage Positive-Going VT+ 1.8 2.7 3.4 Vdc VDD = 5.0 Vdc; TA = 25°C 3
Threshold Voltage Positive-Going VT+ 3.3 5.3 6.9 Vdc VDD = 10 Vdc; TA = 25°C 3
Threshold Voltage Positive-Going VT+ 5.2 8 10.5 Vdc VDD = 15 Vdc; TA = 25°C 3
Threshold Voltage Positive-Going VT+ 1.7 3.4 Vdc VDD = 5.0 Vdc; TA = 125°C 3
Threshold Voltage Positive-Going VT+ 3.2 6.9 Vdc VDD = 10 Vdc; TA = 125°C 3
Threshold Voltage Positive-Going VT+ 5.2 10.5 Vdc VDD = 15 Vdc; TA = 125°C 3
Threshold Voltage Negative-Going VT- 1.6 3.3 Vdc VDD = 5.0 Vdc; TA = -55°C 3
Threshold Voltage Negative-Going VT- 3 6.7 Vdc VDD = 10 Vdc; TA = -55°C 3
Threshold Voltage Negative-Going VT- 4.5 9.7 Vdc VDD = 15 Vdc; TA = -55°C 3
Threshold Voltage Negative-Going VT- 1.6 2.1 3.2 Vdc VDD = 5.0 Vdc; TA = 25°C 3
Threshold Voltage Negative-Going VT- 3 4.6 6.7 Vdc VDD = 10 Vdc; TA = 25°C 3
Threshold Voltage Negative-Going VT- 4.6 6.9 9.8 Vdc VDD = 15 Vdc; TA = 25°C 3
Threshold Voltage Negative-Going VT- 1.5 3.2 Vdc VDD = 5.0 Vdc; TA = 125°C 3
Threshold Voltage Negative-Going VT- 4.7 9.9 Vdc VDD = 15 Vdc; TA = 125°C 3
Hysteresis Voltage VH 0.25 0.6 1 Vdc VDD = 5.0 Vdc; TA = 25°C 3
Hysteresis Voltage VH 0.3 0.7 1.2 Vdc VDD = 10 Vdc; TA = 25°C 3
Hysteresis Voltage VH 0.6 1.1 1.5 Vdc VDD = 15 Vdc; TA = 25°C 3
Output Voltage 0 Level VOL 0 0.05 Vdc Vin = VDD; VDD = 5.0 Vdc; TA = 25°C 3
Output Voltage 1 Level VOH 4.95 5 Vdc Vin = 0; VDD = 5.0 Vdc; TA = 25°C 3
Output Voltage 1 Level VOH 9.95 10 Vdc Vin = 0; VDD = 10 Vdc; TA = 25°C 3
Output Voltage 1 Level VOH 14.95 15 Vdc Vin = 0; VDD = 15 Vdc; TA = 25°C 3
Output Drive Current Source IOH -2.4 -4.2 mAdc Source; VOH = 2.5 Vdc; VDD = 5.0 Vdc; TA = 25°C 3
Output Drive Current Source IOH -0.51 -0.88 mAdc Source; VOH = 4.6 Vdc; VDD = 5.0 Vdc; TA = 25°C 3
Output Drive Current Source IOH -1.3 -2.25 mAdc Source; VOH = 9.5 Vdc; VDD = 10 Vdc; TA = 25°C 3
Output Drive Current Source IOH -3.4 -8.8 mAdc Source; VOH = 13.5 Vdc; VDD = 15 Vdc; TA = 25°C 3

CAD (KiCad official)

  • Symbol: MC14584BDG
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: mc14584bdg-etched.step / mc14584bdg-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); mc14584bdg.step / mc14584bdg.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 00c18cc076b9bc3e, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF