component
TPS60110PWPR
Public Made by Adomby adom
Texas Instruments DC-DC Converters, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS60110PWPR
Texas Instruments · DC-DC Converters · HTSSOP-20-EP
TPS60110PWPR from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Analog ground for internal reference and control circuitry; connect to PGND through a short trace. |
| 2 | SYNC | input | External clock synchronization selection; connect to GND for internal clock or to IN for external synchronization. |
| 3 | ENABLE | input | Enable logic input that turns off device and reduces supply current to 0.05 µA maximum when low; must be high only when VIN is in recommended range. |
| 4 | FB | input | Feedback input connected to internal 1.22 V bandgap reference through on-chip resistive divider for voltage regulation. |
| 5 | OUT | output | Regulated 5 V ±4% power output with 300 mA maximum current from 2.7 V to 5.4 V input; connect both OUT pins together and bypass to GND with output filter capacitor. |
| 6 | C1+ | passive | Positive terminal of charge-pump transfer capacitor C1F. |
| 7 | IN | power_in | Supply input in 2.7 V to 5.4 V range; bypass to GND with (CO/2) µF capacitor and connect both IN pins through short trace. |
| 8 | C1− | passive | Negative terminal of charge-pump transfer capacitor C1F. |
| 9 | PGND | power_in | Power ground through which charge-pump current flows; connect all PGND pins (9-12) together. |
| 10 | PGND | power_in | Power ground through which charge-pump current flows; connect all PGND pins (9-12) together. |
| 11 | PGND | power_in | Power ground through which charge-pump current flows; connect all PGND pins (9-12) together. |
| 12 | PGND | power_in | Power ground through which charge-pump current flows; connect all PGND pins (9-12) together. |
| 13 | C2− | passive | Negative terminal of charge-pump transfer capacitor C2F. |
| 14 | IN | power_in | Supply input in 2.7 V to 5.4 V range; bypass to GND with (CO/2) µF capacitor and connect both IN pins through short trace. |
| 15 | C2+ | passive | Positive terminal of charge-pump transfer capacitor C2F. |
| 16 | OUT | output | Regulated 5 V ±4% power output with 300 mA maximum current from 2.7 V to 5.4 V input; connect both OUT pins together and bypass to GND with output filter capacitor. |
| 17 | SKIP | input | Mode selection input; logic low for constant-frequency mode with minimized output ripple, high or connected to IN for pulse-skip mode. |
| 18 | COM | input | Mode selection input; logic low for push-pull mode with minimized ripple, high or connected to IN for single-ended mode requiring only one flying capacitor. |
| 19 | CLK | input | External clock signal input; connect to GND if internal clock is used, or drive with 400-800 kHz external clock when SYNC connected to IN. |
| 20 | GND | power_in | Analog ground for internal reference and control circuitry; connect to PGND through a short trace. |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20-EP |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS60110PWPR - Footprint:
Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm - 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
tps60110pwpr-etched.step/tps60110pwpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps60110pwpr.step/tps60110pwpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (28 pp, sha256
f7e42aa999eb63ef, retrieved 2026-10-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).