component
MC74VHC1G32DFT2G
Public Made by Adomby adom
onsemi Logic Gates, SC-70-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMC74VHC1G32DFT2G
onsemi · Logic Gates · SC-70-5
MC74VHC1G32DFT2G from onsemi, in a SC-70-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | B | input | Input B of the 2-input OR gate; the input structure is over-voltage tolerant up to 5.5 V regardless of the supply voltage. |
| 2 | A | input | Input A of the 2-input OR gate; the input structure is over-voltage tolerant up to 5.5 V regardless of the supply voltage. |
| 3 | GND | power_in | Ground reference pin (0 V). |
| 4 | Y | output | OR gate output (Y = A OR B); the output source/sink current is rated at ±25 mA maximum (absolute maximum rating). |
| 5 | VCC | power_in | Positive supply pin; the device is designed for 2.0 V to 5.5 V VCC operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | SC-70-5 |
| Category | Logic |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Positive DC Supply Voltage | VCC | 2 | 5.5 | V | 4 | ||
| DC Input Voltage | VIN | 0 | 5.5 | V | 4 | ||
| DC Output Voltage, Active-Mode (High or Low State) | VOUT | 0 | V | Active-Mode; max printed as VCC | 4 | ||
| DC Output Voltage, Tri-State Mode | VOUT | 0 | 5.5 | V | Tri-State Mode (Note 1) | 4 | |
| DC Output Voltage, Power-Down Mode | VOUT | 0 | 5.5 | V | Power-Down Mode (VCC = 0 V) | 4 | |
| Operating Temperature Range | TA | -55 | 125 | °C | 4 | ||
| Input Rise and Fall Time | tr, tf | 0 | 20 | ns/V | VCC = 2.0 V (SC-88A) | 4 | |
| Input Rise and Fall Time | tr, tf | 0 | 10 | ns/V | VCC = 3.0 V to 3.6 V (SC-88A) | 4 | |
| Input Rise and Fall Time | tr, tf | 0 | 5 | ns/V | VCC = 4.5 V to 5.5 V (SC-88A) | 4 | |
| DC Supply Voltage | VCC | -0.5 | 6.5 | V | SC-88A, non-NLV column | 3 | |
| DC Input Voltage | VIN | -0.5 | 6.5 | V | SC-88A, non-NLV column | 3 | |
| DC Output Voltage, Active-Mode (High or Low State) | VOUT | -0.5 | V | Active-Mode; max printed as VCC + 0.5 | 3 | ||
| DC Output Voltage, Tri-State Mode | VOUT | -0.5 | 6.5 | V | Tri-State Mode (Note 1) | 3 | |
| DC Output Voltage, Power-Down Mode | VOUT | -0.5 | 6.5 | V | Power-Down Mode (VCC = 0 V) | 3 | |
| DC Input Diode Current | IIK | -20 | mA | VIN < GND | 3 | ||
| DC Output Diode Current | IOK | -20 | mA | VOUT < GND | 3 | ||
| DC Output Source/Sink Current | IOUT | -25 | 25 | mA | 3 | ||
| DC Supply Current per Supply Pin or Ground Pin | ICC or IGND | -50 | 50 | mA | 3 | ||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 3 | ||
| Lead Temperature | TL | 260 | °C | 1 mm from case for 10 secs | 3 | ||
| Junction Temperature Under Bias | TJ | 150 | °C | 3 | |||
| ESD Withstand Voltage | VESD | 2000 | V | Human Body Model | 3 | ||
| High-Level Input Voltage | VIH | 1.5 | V | VCC = 2.0 V; TA = 25°C | 4 | ||
| High-Level Input Voltage | VIH | 2.1 | V | VCC = 3.0 V; TA = 25°C | 4 | ||
| High-Level Input Voltage | VIH | 3.15 | V | VCC = 4.5 V; TA = 25°C | 4 | ||
| High-Level Input Voltage | VIH | 3.85 | V | VCC = 5.5 V; TA = 25°C | 4 | ||
| Low-Level Input Voltage | VIL | 0.5 | V | VCC = 2.0 V; TA = 25°C | 4 | ||
| Low-Level Input Voltage | VIL | 0.9 | V | VCC = 3.0 V; TA = 25°C | 4 | ||
| Low-Level Input Voltage | VIL | 1.35 | V | VCC = 4.5 V; TA = 25°C | 4 | ||
| Low-Level Input Voltage | VIL | 1.65 | V | VCC = 5.5 V; TA = 25°C | 4 | ||
| High-Level Output Voltage | VOH | 1.9 | V | VIN = VIH or VIL; IOH = −50 µA; VCC = 2.0 V; TA = 25°C | 4 | ||
| High-Level Output Voltage | VOH | 2.9 | V | VIN = VIH or VIL; IOH = −50 µA; VCC = 3.0 V; TA = 25°C | 4 | ||
| High-Level Output Voltage | VOH | 4.4 | V | VIN = VIH or VIL; IOH = −50 µA; VCC = 4.5 V; TA = 25°C | 4 | ||
| High-Level Output Voltage | VOH | 2.58 | V | VIN = VIH or VIL; IOH = −4 mA; VCC = 3.0 V; TA = 25°C | 4 | ||
| High-Level Output Voltage | VOH | 2.34 | V | VIN = VIH or VIL; IOH = −4 mA; VCC = 3.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| High-Level Output Voltage | VOH | 3.94 | V | VIN = VIH or VIL; IOH = −8 mA; VCC = 4.5 V; TA = 25°C | 4 | ||
| High-Level Output Voltage | VOH | 3.66 | V | VIN = VIH or VIL; IOH = −8 mA; VCC = 4.5 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| Low-Level Output Voltage | VOL | 0 | 0.1 | V | VIN = VIH or VIL; IOL = 50 µA; VCC = 2.0 V; TA = 25°C | 4 | |
| Low-Level Output Voltage | VOL | 0.36 | V | VIN = VIH or VIL; IOL = 4 mA; VCC = 3.0 V; TA = 25°C | 4 | ||
| Low-Level Output Voltage | VOL | 0.52 | V | VIN = VIH or VIL; IOL = 4 mA; VCC = 3.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| Input Leakage Current | IIN | -1 | 1 | µA | VIN = 5.5 V or GND; VCC 2.0 to 5.5 V; −55°C ≤ TA ≤ 125°C | 4 | |
| Power Off Leakage Current | IOFF | 1 | µA | VIN = 5.5 V or VOUT = 5.5 V; VCC = 0.0 V; TA = 25°C | 4 | ||
| Power Off Leakage Current | IOFF | 10 | µA | VIN = 5.5 V or VOUT = 5.5 V; VCC = 0.0 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| Quiescent Supply Current | ICC | 1 | 20 | µA | VIN = VCC or GND; VCC = 5.5 V; TA = 25°C | 4 | |
| Quiescent Supply Current | ICC | 40 | µA | VIN = VCC or GND; VCC = 5.5 V; −55°C ≤ TA ≤ 125°C | 4 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 4.8 | 7.9 | ns | CL = 15 pF; VCC = 3.0 V to 3.6 V; TA = 25°C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 11.5 | ns | CL = 15 pF; VCC = 3.0 V to 3.6 V; −55°C ≤ TA ≤ 125°C | 5 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 6.1 | 11.4 | ns | CL = 50 pF; VCC = 3.0 V to 3.6 V; TA = 25°C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 15.5 | ns | CL = 50 pF; VCC = 3.0 V to 3.6 V; −55°C ≤ TA ≤ 125°C | 5 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 3.7 | 5.5 | ns | CL = 15 pF; VCC = 4.5 V to 5.5 V; TA = 25°C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 8 | ns | CL = 15 pF; VCC = 4.5 V to 5.5 V; −55°C ≤ TA ≤ 125°C | 5 | ||
| Propagation Delay, A to Y | tPLH, tPHL | 4.4 | 7.5 | ns | CL = 50 pF; VCC = 4.5 V to 5.5 V; TA = 25°C | 5 | |
| Propagation Delay, A to Y | tPLH, tPHL | 10 | ns | CL = 50 pF; VCC = 4.5 V to 5.5 V; −55°C ≤ TA ≤ 125°C | 5 | ||
| Thermal Resistance, Junction-to-Ambient | θJA | 377 | °C/W | SC-88A; minimum pad spacing on FR4 (Note 2) | 3 |
CAD (KiCad official)
- Symbol:
MC74VHC1G32DFT2G - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SC-70-5 (KiCad packages3D, STEP)
- 3D model files:
mc74vhc1g32dft2g-etched.step/mc74vhc1g32dft2g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);mc74vhc1g32dft2g.step/mc74vhc1g32dft2g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (15 pp, sha256
cf4ce5ef738fbac6, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).