ISL28025FR12Z from RENESAS, in a TQFN-20-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VBUS	power_in	Bus voltage sense input for the monitored supply; the primary channel range is 0V to 60V, or 0V to 16V on the other option.
2	GND	power_in	Device ground; in dual supply systems it connects to the negative voltage supply.
3	AUXV	input	Auxiliary port single-ended voltage input with a measurable range of 0V to VCC.
4	DAC_OUT	output	Margin DAC voltage output, which ranges from 0V to 2.4V and is controlled through internal registers.
5	NC	unconnected	No connection; the datasheet lists this pin as Float.
6	SMBCLK	input	SMBus/I2C clock input that is always active and requires a pull-up resistor to I2CVCC.
7	SMBDAT	bidirectional	SMBus/I2C serial data input/output, an open-drain pin that requires a pull-up resistor to I2CVCC.
8	NC	unconnected	No connection; the datasheet lists this pin as Float.
9	SMBALERT1	output	SMBus Alert1 open-drain output that requires a pull-up to a supply of up to 24V.
10	SMBALERT2	output	CPU interrupt output with a push/pull stage used for fault acknowledgment.
11	GND	power_in	Device ground; in dual supply systems it connects to the negative voltage supply.
12	A0	input	I2C/SMBus slave address select input that is one of four levels: I2CVCC, GND, SCL or SDA.
13	A1	input	I2C/SMBus slave address select input that is one of four levels: I2CVCC, GND, SCL or SDA.
14	A2	input	I2C/SMBus slave address select input that is one of four levels: I2CVCC, GND, SCL or SDA.
15	I2CVCC	power_in	I2C level shifter supply with an allowable range of 1.2V to 5.5V; connect to VCC if a level shifter is not used.
16	VCC	power_in	Chip positive supply with an allowable range of 3V to 5.5V.
17	VREG_OUT	power_out	Internal voltage regulator output that sources a regulated 3.3V; connect a proper decoupling capacitor to this pin.
18	VINM	input	Current sense minus input; the maximum measurable differential between VINP and VINM is 80mV.
19	VINP	input	Current sense plus input; the maximum measurable differential between VINP and VINM is 80mV.
20	VREG_IN	power_in	Voltage regulator input with an operable range of 4.5V to 60V; connect to ground if the regulator is not used.
21	EPAD	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	RENESAS
Package	TQFN-20-EP(4x4)
Category	Power Management ICs
Pins	21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage VCC	VCC			6	V		7
I2C_VCC voltage	I2CVCC			6	V		7
VBUS voltage	VBUS			16.684	V	ISL28025FI12, ISL28025FR12	7
REG_IN voltage	REG_IN			63	V		7
Common-mode input voltage	VINP, VINM			63	V		7
Differential input voltage	VINP, VINM	-63		63	V		7
Input voltage (digital pins)		-0.3			V	Referenced to GND; maximum is I2CVCC + 0.3V	7
Output voltage (digital pins)		-0.3			V	Referenced to GND; maximum is I2CVCC + 0.3V	7
Output current (VREG_OUT, DAC_OUT)				10	mA	VREG_OUT, DAC_OUT (20 Pin QFN)	7
Open drain output current				10	mA		7
Open drain voltage (SMBALERT1)				24	V	SMBALERT1	7
ESD Human Body Model				6	kV	HBM	7
ESD Machine Model				300	V	MM	7
ESD Charged Device Model				2	kV	CDM	7
Latch-up		-100		100	mA	at +125°C	7
Maximum storage temperature range		-65		150	°C		7
Maximum junction temperature (TJMAX)	TJMAX			150	°C		7
Ambient temperature range (TA)	TA	-40		125	°C		7
Thermal resistance, junction to ambient (20 lead QFN 4x4)	JA		40		°C/W	Notes 5, 6; typical value	7
Thermal resistance, junction to case (20 lead QFN 4x4)	JC		2.5		°C/W	Notes 5, 6; typical value	7
VSHUNT measurement range (VINP to VINM)	VSHUNT	0		81.91	mV	VINP to VINM	7
VSHUNT offset voltage	Vshunt_vos	-50	2.5	50	µV		7
VSHUNT offset voltage vs temperature	Vshunt_TC	-0.3	0.04	0.3	µV/°C	T = -40°C to +125°C	7
VSHUNT Vos vs common-mode (ISL28025FI12Z, ISL28025FR12Z)	Vshunt_CMRR	-2	0.2	2	µV/V	ISL28025FI12Z, ISL28025FR12Z; VBUS = 0V to 16.384V	7
VIN input leakage current (path selected, OC detector disabled)	Ivin		15	20	µA	VIN = VSHUNT input path selected, OC detector disabled	7
VIN input leakage current (path selected, OC detector enabled)	Ivin		30	40	µA	VIN = VSHUNT input path selected, OC detector enabled	7
VIN input leakage current (path disabled, OC detector disabled)	Ivin		0.05	0.1	µA	VIN = VSHUNT input path disabled, OC detector disabled	7
Usable bus voltage measurement range (ISL28025FI12Z, ISL28025FR12Z)	VBUS	0		16.384	V	ISL28025FI12Z, ISL28025FR12Z	7
VBUS offset voltage (ISL28025FI12Z, ISL28025FR12Z)	Vbus_vos	-5	0.25	5	mV	ISL28025FI12Z, ISL28025FR12Z	8
VBUS offset voltage vs temperature (ISL28025FI12Z, ISL28025FR12Z)	Vbus_TC	-100	1	100	µV/°C	ISL28025FI12Z, ISL28025FR12Z; T = -40°C to +125°C	8
Usable AUXV voltage measurement range	Vauxv	0			V	Maximum is VCC (symbolic, not numeric)	8
AUXV offset voltage	Vauxv_vos	-4	0.3	4	mV		8
AUXV offset voltage vs temperature	Vauxv_TC	-22	0.2	22	µV/°C	T = -40°C to +125°C	8
Primary shunt voltage gain error		-0.25	0.05	0.25	%		8
Primary shunt voltage gain error vs temperature		-60	0	60	ppm/°C	T = -40°C to +125°C	8
Primary bus voltage gain error		-0.25	0.05	0.25	%		8
Primary bus voltage gain error vs temperature		-70	10	70	ppm/°C	T = -40°C to +125°C	8
Aux bus voltage gain error		-0.25	0.05	0.25	%		8
Aux bus voltage gain error vs temperature		-65	10	65	ppm/°C	T = -40°C to +125°C	8
ADC conversion time ts (power-up)	ts		64	70.4	µs	Power-up; ADC[2:0] = 0h	8
ADC conversion time ts (power-up)	ts		128	140.8	µs	Power-up; ADC[2:0] = 1h	8
ADC conversion time ts (power-up)	ts		256	281.6	µs	Power-up; ADC[2:0] = 2h	8
ADC conversion time ts (power-up)	ts		512	563.2	µs	Power-up; ADC[2:0] = 3h	8
ADC conversion time ts (power-up)	ts		1.024	1.126	ms	Power-up; ADC[2:0] = 4, 5h	8
ADC conversion time ts (power-up)	ts		2.048	2.253	ms	Power-up; ADC[2:0] = 6, 7h	8

CAD (KiCad official)

Symbol: ISL28025FR12Z
Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
3D model: TQFN-20-EP(4x4) (KiCad packages3D, STEP)
3D model files: isl28025fr12z-etched.step / isl28025fr12z-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); isl28025fr12z.step / isl28025fr12z.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: RENESAS datasheet (53 pp, sha256 f9bb6d810fc48c6d, retrieved 2026-10-30, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ISL28025FR12Z

Verified ISL28025FR12Z

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3D Model

Symbol & Footprint

Schematic Symbol

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Datasheet

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