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SN74AHCT157PWR
Public Made by Adomby adom
Texas Instruments Logic ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74AHCT157PWR
Texas Instruments · Logic ICs · TSSOP-16
SN74AHCT157PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A/B | input | Address select input: with G low, a low selects the 1A/2A/3A/4A data inputs and a high selects the 1B/2B/3B/4B inputs. |
| 2 | 1A | input | Channel 1 data input A, routed to 1Y when G is low and A/B is low. |
| 3 | 1B | input | Channel 1 data input B, routed to 1Y when G is low and A/B is high. |
| 4 | 1Y | output | Channel 1 data output, which is low whenever the strobe G is high. |
| 5 | 2A | input | Channel 2 data input A, routed to 2Y when G is low and A/B is low. |
| 6 | 2B | input | Channel 2 data input B, routed to 2Y when G is low and A/B is high. |
| 7 | 2Y | output | Channel 2 data output, which is low whenever the strobe G is high. |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | 3Y | output | Channel 3 data output, which is low whenever the strobe G is high. |
| 10 | 3B | input | Channel 3 data input B, routed to 3Y when G is low and A/B is high. |
| 11 | 3A | input | Channel 3 data input A, routed to 3Y when G is low and A/B is low. |
| 12 | 4Y | output | Channel 4 data output, which is low whenever the strobe G is high. |
| 13 | 4B | input | Channel 4 data input B, routed to 4Y when G is low and A/B is high. |
| 14 | 4A | input | Channel 4 data input A, routed to 4Y when G is low and A/B is low. |
| 15 | G | input | Output strobe, active low: when high, all outputs are forced low; when low, a 4-bit word is selected. |
| 16 | VCC | power_in | Positive supply, specified for 4.5 V to 5.5 V operation. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.5 | 5.5 | V | 4 | ||
| High-level input voltage | VIH | 2 | V | 4 | |||
| Low-level input voltage | VIL | 0.8 | V | 4 | |||
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage | VO | 0 | V | maximum printed as VCC | 4 | ||
| High-level output current | IOH | -8 | mA | 4 | |||
| Low-level output current | IOL | 8 | mA | 4 | |||
| Input transition rise or fall time | Δt/Δv | 20 | ns/V | 4 | |||
| Operating free-air temperature (SN74AHCT157) | TA | -40 | 85 | °C | 4 | ||
| Supply voltage range | VCC | -0.5 | 7 | V | over operating free-air temperature range | 4 | |
| Input voltage range | VI | -0.5 | 7 | V | over operating free-air temperature range | 4 | |
| Output voltage range | VO | -0.5 | V | maximum printed as VCC + 0.5 V | 4 | ||
| Input clamp current | IIK | -20 | mA | VI < 0 | 4 | ||
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 4 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | ICC/IGND | -50 | 50 | mA | 4 | ||
| Storage temperature range | Tstg | -65 | 150 | °C | 4 | ||
| High-level output voltage | VOH | 4.4 | 4.5 | V | IOH = -50μA; VCC = 4.5V | 4 | |
| Low-level output voltage | VOL | 0.1 | V | IOL = 50μA; VCC = 4.5V | 5 | ||
| Low-level output voltage | VOL | 0.44 | V | IOL = 8mA; VCC = 4.5V | 5 | ||
| Input leakage current | II | -1 | 1 | μA | VI = 5.5V or GND; 0V to 5.5V | 5 | |
| Quiescent supply current | ICC | 2 | 20 | μA | VI = VCC or GND; IO = 0; VCC = 5.5V | 5 | |
| Additional supply current per TTL input | ΔICC | 1.35 | 1.5 | mA | One input at 3.4V, other inputs at VCC or GND; VCC = 5.5V | 5 | |
| Input capacitance | Ci | 2 | 10 | pF | VI = VCC or GND; VCC = 5V | 5 | |
| Propagation delay low-to-high, A or B to Y | tPLH | 1 | 6.4 | 7.5 | ns | CL = 15pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay high-to-low, A or B to Y | tPHL | 1 | 6.4 | 7.5 | ns | CL = 15pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay low-to-high, A/B to Y | tPLH | 1 | 8.1 | 9.5 | ns | CL = 15pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay high-to-low, A/B to Y | tPHL | 1 | 8.1 | 9.5 | ns | CL = 15pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay low-to-high, G to Y | tPLH | 1 | 8.6 | 10 | ns | CL = 15pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay high-to-low, G to Y | tPHL | 1 | 8.6 | 10 | ns | CL = 15pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay low-to-high, A or B to Y | tPLH | 1 | 8.7 | 9.8 | ns | CL = 50pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay high-to-low, A or B to Y | tPHL | 1 | 8.7 | 9.8 | ns | CL = 50pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay low-to-high, A/B to Y | tPLH | 1 | 10.4 | 12 | ns | CL = 50pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay high-to-low, A/B to Y | tPHL | 1 | 10.4 | 12 | ns | CL = 50pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay low-to-high, G to Y | tPLH | 1 | 11 | 12 | ns | CL = 50pF; VCC = 5V ± 0.5V | 5 |
| Propagation delay high-to-low, G to Y | tPHL | 1 | 11 | 12 | ns | CL = 50pF; VCC = 5V ± 0.5V | 5 |
| Quiet output, maximum dynamic VOL | VOL(P) | 0.4 | 0.8 | V | VCC = 5V, CL = 50pF, TA = 25°C | 5 | |
| Quiet output, minimum dynamic VOL | VOL(V) | -0.8 | -0.4 | V | VCC = 5V, CL = 50pF, TA = 25°C | 5 | |
| Quiet output, minimum dynamic VOH | VOH(V) | 1.8 | V | VCC = 5V, CL = 50pF, TA = 25°C | 5 | ||
| High-level dynamic input voltage | VIH(D) | 2 | V | VCC = 5V, CL = 50pF, TA = 25°C | 5 | ||
| Low-level dynamic input voltage | VIL(D) | 0.8 | V | VCC = 5V, CL = 50pF, TA = 25°C | 5 | ||
| Junction-to-ambient thermal resistance (PW package) | RθJA | 135.9 | °C/W | PW (TSSOP, 16) package | 4 |
CAD (KiCad official)
- Symbol:
SN74AHCT157PWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sn74ahct157pwr-etched.step/sn74ahct157pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ahct157pwr.step/sn74ahct157pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
253c4ef1919a5088, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).