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MSP430FR2032IPMR
Public Made by Adomby adom
Texas Instruments Microcontrollers (MCU/MPU/SOC), LQFP-64(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownMSP430FR2032IPMR
Texas Instruments · Microcontrollers (MCU/MPU/SOC) · LQFP-64(10x10)
MSP430FR2032IPMR from Texas Instruments, in a LQFP-64(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P4.7 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction (P4DIR.n = 1). |
| 2 | P4.6 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction (P4DIR.n = 1). |
| 3 | P4.5 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction (P4DIR.n = 1). |
| 4 | P4.4 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction (P4DIR.n = 1). |
| 5 | P4.3 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction (P4DIR.n = 1). |
| 6 | P4.2/XOUT | bidirectional | General-purpose I/O; output terminal for the crystal oscillator, which supports only a 32-kHz low-frequency crystal. |
| 7 | P4.1/XIN | bidirectional | General-purpose I/O; input terminal for the crystal oscillator, which supports only a 32-kHz low-frequency crystal (or a digital clock in XT1BYPASS mode). |
| 8 | DVSS | power_in | Power ground; all voltages are referenced to VSS (0 V). |
| 9 | DVCC | power_in | Supply voltage 1.8 V to 3.6 V (recommended operating range, absolute maximum -0.3 V to 4.1 V), with a 4.7 µF to 10 µF capacitor recommended at DVCC. |
| 10 | RST/NMI/SBWTDIO | bidirectional | Active-low reset input, also nonmaskable interrupt input and Spy-Bi-Wire data I/O; if unused, use a 47-kΩ pullup to DVCC or internal pullup with a 10-nF (or 1.1-nF) pulldown. |
| 11 | TEST/SBWTCK | input | Test mode pin, also the Spy-Bi-Wire input clock; it always has an internal pulldown enabled, so leave it open if unused. |
| 12 | P4.0/TA1.1 | bidirectional | General-purpose I/O; Timer TA1 CCR1 capture input (CCI1A) or compare output (Out1). |
| 13 | P8.3/TA1.2 | bidirectional | General-purpose I/O; Timer TA1 CCR2 capture input (CCI2A) or compare output (Out2). |
| 14 | P8.2/TA1CLK | bidirectional | General-purpose I/O; timer clock input TACLK for TA1. |
| 15 | P8.1/ACLK/A9 | bidirectional | General-purpose I/O; ACLK output or ADC analog input A9, available only in the LQFP-64 package. |
| 16 | P8.0/SMCLK/A8 | bidirectional | General-purpose I/O; SMCLK output or ADC analog input A8, available only in the LQFP-64 package. |
| 17 | P1.7/TA0.1/TDO/A7 | bidirectional | General-purpose I/O; Timer TA0 CCR1 capture/compare, JTAG test data output TDO, or ADC analog input A7; TI recommends disabling the pin interrupt during JTAG debug. |
| 18 | P1.6/TA0.2/TDI/TCLK/A6 | bidirectional | General-purpose I/O; Timer TA0 CCR2 capture/compare, JTAG test data input TDI/TCLK, or ADC analog input A6; TI recommends disabling the pin interrupt during JTAG debug. |
| 19 | P1.5/TA0CLK/TMS/A5 | bidirectional | General-purpose I/O; Timer TA0 clock input TA0CLK, JTAG mode select TMS, or ADC analog input A5. |
| 20 | P1.4/MCLK/TCK/A4/VREF+ | bidirectional | General-purpose I/O; MCLK output, JTAG clock TCK, or ADC analog input A4/VREF+; when A4 is used, the PMM 1.2-V reference can be output to this pin. |
| 21 | P1.3/UCA0STE/A3 | bidirectional | General-purpose I/O; eUSCI_A0 STE, or ADC analog input A3. |
| 22 | P1.2/UCA0CLK/A2 | bidirectional | General-purpose I/O; eUSCI_A0 clock UCA0CLK, or ADC analog input A2. |
| 23 | P1.1/UCA0RXD/UCA0SOMI/A1/Veref+ | bidirectional | General-purpose I/O; eUSCI_A0 UART RXD or SPI SOMI, ADC analog input A1, or external positive reference Veref+. |
| 24 | P1.0/UCA0TXD/UCA0SIMO/A0/Veref- | bidirectional | General-purpose I/O; eUSCI_A0 UART TXD or SPI SIMO, ADC analog input A0, or external negative reference Veref-. |
| 25 | P5.7 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 26 | P5.6 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 27 | P5.5 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 28 | P5.4 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 29 | P5.3/UCB0SOMI/UCB0SCL | bidirectional | General-purpose I/O; eUSCI_B0 SPI SOMI or I2C clock SCL. |
| 30 | P5.2/UCB0SIMO/UCB0SDA | bidirectional | General-purpose I/O; eUSCI_B0 SPI SIMO or I2C data SDA. |
| 31 | P5.1/UCB0CLK | bidirectional | General-purpose I/O; eUSCI_B0 SPI clock UCB0CLK. |
| 32 | P5.0/UCB0STE | bidirectional | General-purpose I/O; eUSCI_B0 SPI STE. |
| 33 | P2.7 | bidirectional | General-purpose I/O with pin interrupt capability; P1 and P2 interrupt pins can wake the MCU from LPM3.5. |
| 34 | P2.6 | bidirectional | General-purpose I/O with pin interrupt capability; P1 and P2 interrupt pins can wake the MCU from LPM3.5. |
| 35 | P2.5 | bidirectional | General-purpose I/O with pin interrupt capability; P1 and P2 interrupt pins can wake the MCU from LPM3.5. |
| 36 | P2.4 | bidirectional | General-purpose I/O with pin interrupt capability; P1 and P2 interrupt pins can wake the MCU from LPM3.5. |
| 37 | P2.3 | bidirectional | General-purpose I/O with pin interrupt capability; P1 and P2 interrupt pins can wake the MCU from LPM3.5. |
| 38 | P2.2 | bidirectional | General-purpose I/O with pin interrupt capability; P1 and P2 interrupt pins can wake the MCU from LPM3.5. |
| 39 | P2.1 | bidirectional | General-purpose I/O with pin interrupt capability; P1 and P2 interrupt pins can wake the MCU from LPM3.5. |
| 40 | P2.0 | bidirectional | General-purpose I/O with pin interrupt capability; P1 and P2 interrupt pins can wake the MCU from LPM3.5. |
| 41 | P6.7 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 42 | P6.6 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 43 | P6.5 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 44 | P6.4 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 45 | P6.3 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 46 | P6.2 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 47 | P6.1 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 48 | P6.0 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 49 | P3.7 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 50 | P3.6 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 51 | P3.5 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 52 | P3.4 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 53 | P3.3 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 54 | P3.2 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 55 | P3.1 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 56 | P3.0 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 57 | P7.7 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 58 | P7.6 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 59 | P7.5 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 60 | P7.4 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 61 | P7.3 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 62 | P7.2 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 63 | P7.1 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
| 64 | P7.0 | bidirectional | General-purpose I/O that is also capacitive-touch capable; if unused, set to port function with output direction. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | LQFP-64(10x10) |
| Category | Embedded Processors & Controllers |
| Pins | 64 |
CAD (KiCad official)
- Symbol:
MSP430FR2032IPMR - Footprint:
Package_QFP:LQFP-64_10x10mm_P0.5mm - 3D model: LQFP-64(10x10) (KiCad packages3D, STEP)
- 3D model files:
msp430fr2032ipmr-etched.step/msp430fr2032ipmr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);msp430fr2032ipmr.step/msp430fr2032ipmr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (99 pp, sha256
6220799f5c3a8c78, retrieved 2026-10-08, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).