component
TAS5825PRHBR
Public Made by Adomby adom
Texas Instruments Audio Power OpAmps, VQFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTAS5825PRHBR
Texas Instruments · Audio Power OpAmps · VQFN-32-EP(5x5)
TAS5825PRHBR from Texas Instruments, in a VQFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | BST_A+ | power_out | Connection point for the OUT_A+ bootstrap capacitor which is used to create a power supply for the high-side gate drive for OUT_A+. |
| 2 | OUT_A+ | output | Positive pin for differential speaker amplifier output A. |
| 3 | PVDD | power_in | PVDD voltage input. |
| 4 | PVDD | power_in | PVDD voltage input. |
| 5 | DGND | power_in | Digital ground. |
| 6 | DVDD | power_in | 3.3-V or 1.8-V digital power supply. |
| 7 | VR_DIG | power_out | Internally regulated 1.5-V digital supply voltage. This pin must not be used to drive external devices. |
| 8 | ADR | passive | A table of resistor value (pull down to GND) decides device I2C address. See table 9-5. |
| 9 | GPIO0 | bidirectional | General-purpose input/output, function programmable by register (0x60h and 0x61h); can be configured as CMOS output or open drain output (HPFB, WARNZ or FAULTZ). |
| 10 | GPIO1 | bidirectional | General-purpose input/output, function programmable by register (0x60h and 0x62h); can be configured as CMOS output or open drain output (HPFB, WARNZ or FAULTZ). |
| 11 | GPIO2 | bidirectional | General-purpose input/output, function programmable by register (0x60h and 0x63h); can be configured as CMOS output or open drain output (HPFB, WARNZ or FAULTZ). |
| 12 | LRCLK | input | Word select clock for the digital signal on the serial port's input data line; left/right channel boundary in I2S, LJ and RJ, and frame sync boundary in TDM mode. |
| 13 | SCLK | input | Bit clock for the digital signal active on the input data line of the serial data port (also written as BCLK). |
| 14 | SDIN | input | Data line to the serial data port. |
| 15 | SDA | bidirectional | I2C serial control data interface input/output. |
| 16 | SCL | input | I2C serial control clock input. |
| 17 | PDN | input | Power down, active-low; places the amplifier in shutdown and turns off all internal regulators. |
| 18 | GVDD | power_out | Gate drive internal regulator output. This pin must not be used to drive external devices. |
| 19 | AVDD | power_out | Internally regulated 5-V analog supply voltage. This pin must not be used to drive external devices. |
| 20 | AGND | power_in | Analog ground. |
| 21 | PVDD | power_in | PVDD voltage input. |
| 22 | PVDD | power_in | PVDD voltage input. |
| 23 | OUT_B+ | output | Positive pin for differential speaker amplifier output B. |
| 24 | BST_B+ | power_out | Connection point for the OUT_B+ bootstrap capacitor which is used to create a power supply for the high-side gate drive for OUT_B+. |
| 25 | PGND | power_in | Ground reference for power device circuitry. Connect this pin to system ground. |
| 26 | PGND | power_in | Ground reference for power device circuitry. Connect this pin to system ground. |
| 27 | OUT_B- | output | Negative pin for differential speaker amplifier output B. |
| 28 | BST_B- | power_out | Connection point for the OUT_B- bootstrap capacitor which is used to create a power supply for the high-side gate drive for OUT_B-. |
| 29 | BST_A- | power_out | Connection point for the OUT_A- bootstrap capacitor which is used to create a power supply for the high-side gate drive for OUT_A-. |
| 30 | OUT_A- | output | Negative pin for differential speaker amplifier output A. |
| 31 | PGND | power_in | Ground reference for power device circuitry. Connect this pin to system ground. |
| 32 | PGND | power_in | Ground reference for power device circuitry. Connect this pin to system ground. |
| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-32-EP(5x5) |
| Category | Operational Amplifier/Comparator |
| Pins | 33 |
CAD (KiCad official)
- Symbol:
TAS5825PRHBR - Footprint:
Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm - 3D model: VQFN-32-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
tas5825prhbr-etched.step/tas5825prhbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tas5825prhbr.step/tas5825prhbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (104 pp, sha256
dcbd8137bbaacb78, retrieved 2026-10-28, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).