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PIC16LF1503-I
Public Made by Adomby adom
Microchip Tech MICROCHIP, SOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownPIC16LF1503-I
Microchip Tech · MICROCHIP · SOP-14
PIC16LF1503-I from Microchip Tech, in a SOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive supply; PIC16LF1503 operates from 1.8V to 3.6V. |
| 2 | RA5 | bidirectional | General purpose I/O (TTL input, CMOS output) multiplexed with CLKIN external clock input (EC mode), T1CKI, NCO1CLK and CLC1IN1; has interrupt-on-change and weak pull-up. |
| 3 | RA4 | bidirectional | General purpose I/O multiplexed with AN3, CLKOUT (FOSC/4), T1G, and alternate-pin NCO1 and SDO outputs. |
| 4 | RA3 | input | Input-only pin multiplexed with MCLR (master clear with internal pull-up), VPP programming voltage, CLC1IN0, and alternate-pin T1G and SS. |
| 5 | RC5 | bidirectional | General purpose I/O multiplexed with PWM1 output, CWG1A primary output and CLC1 output (alternate pin). |
| 6 | RC4 | bidirectional | General purpose I/O multiplexed with C2OUT comparator output, CLC2IN1 input and CWG1B complementary output. |
| 7 | RC3 | bidirectional | General purpose I/O multiplexed with AN7, C1IN3-, C2IN3-, PWM2 output, CLC2IN0 input and SS. |
| 8 | RC2 | bidirectional | General purpose I/O multiplexed with AN6, C1IN2-, C2IN2- and SDO (SPI data output). |
| 9 | RC1 | bidirectional | General purpose I/O multiplexed with AN5, C1IN1-, C2IN1-, PWM4 output, NCO1 output, SDA (I2C data) and SDI (SPI data input). |
| 10 | RC0 | bidirectional | General purpose I/O multiplexed with AN4, C2IN+, CLC2 output, SCL (I2C clock) and SCK (SPI clock). |
| 11 | RA2 | bidirectional | General purpose I/O multiplexed with AN2, C1OUT, DACOUT2, T0CKI, INT, PWM3, CLC1 output and CWG1FLT fault input. |
| 12 | RA1 | bidirectional | General purpose I/O multiplexed with AN1, VREF+, C1IN0-, C2IN0- and ICSPCLK serial programming clock. |
| 13 | RA0 | bidirectional | General purpose I/O multiplexed with AN0, C1IN+, DACOUT1 and ICSPDAT (ICSP data I/O). |
| 14 | VSS | power_in | Ground reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Microchip Tech |
| Package | SOP-14 |
| Category | Embedded Processors & Controllers |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage | VDD | 1.8 | 3.6 | V | FOSC ≤ 16 MHz | 270 | |
| Supply Voltage | VDD | 2.5 | 3.6 | V | FOSC ≤ 20 MHz | 270 | |
| RAM Data Retention Voltage | VDR | 1.5 | V | Device in Sleep mode | 270 | ||
| Fixed Voltage Reference Voltage | VFVR | -4 | 4 | % | 1x gain (1.024V nominal), VDD ≥ 2.5V, -40°C ≤ TA ≤ +85°C | 270 | |
| VDD Rise Rate | SVDD | 0.05 | V/ms | Ensures that the Power-on Reset signal is released properly. | 270 | ||
| Supply Current | IDD | 30 | 65 | µA | D013, VDD = 1.8V, FOSC = 1 MHz, External Clock (ECM), Medium-Power mode | 272 | |
| Supply Current | IDD | 55 | 100 | µA | D013, VDD = 3.0V, FOSC = 1 MHz, External Clock (ECM), Medium-Power mode | 272 | |
| Supply Current | IDD | 115 | 190 | µA | D014, VDD = 1.8V, FOSC = 4 MHz, External Clock (ECM), Medium-Power mode | 272 | |
| Supply Current | IDD | 600 | 940 | µA | D018, VDD = 1.8V, FOSC = 16 MHz, HFINTOSC | 272 | |
| Base Power-Down Current | IPD | 0.02 | 1 | µA | D022, VDD = 1.8V, max at +85°C, WDT, BOR, FVR and SOSC disabled, all Peripherals inactive | 274 | |
| Base Power-Down Current | IPD | 0.02 | 8 | µA | D022, VDD = 1.8V, max at +125°C, WDT, BOR, FVR and SOSC disabled, all Peripherals inactive | 274 | |
| WDT Current | IPD | 0.26 | 2 | µA | D023, VDD = 1.8V, max at +85°C | 274 | |
| FVR Current | IPD | 15 | 28 | µA | D023A, VDD = 1.8V, max at +85°C | 274 | |
| BOR Current | IPD | 6 | 17 | µA | D024, VDD = 3.0V, max at +85°C | 274 | |
| LPBOR Current | IPD | 0.1 | 4 | µA | D24A, VDD = 3.0V, max at +85°C | 274 | |
| ADC Current, no conversion in progress | IPD | 0.11 | 1.5 | µA | D026, VDD = 1.8V, max at +85°C, ADC clock source FRC | 275 | |
| Comparator Current | IPD | 7 | 22 | µA | D027, VDD = 1.8V, CxSP = 0, max at +85°C | 275 | |
| Input Low Voltage, TTL buffer | VIL | 0.8 | V | D030, 4.5V ≤ VDD ≤ 5.5V | 276 | ||
| Input Low Voltage, SMbus levels | VIL | 0.8 | V | 2.7V ≤ VDD ≤ 5.5V | 276 | ||
| Input High Voltage, TTL buffer | VIH | 2 | V | D040, 4.5V ≤ VDD ≤ 5.5V | 276 | ||
| Input High Voltage, SMbus levels | VIH | 2.1 | V | 2.7V ≤ VDD ≤ 5.5V | 276 | ||
| Input Leakage Current, I/O Ports | IIL | -125 | 5 | 125 | nA | D060, VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 85°C | 276 |
| Input Leakage Current, I/O Ports | IIL | -1000 | 5 | 1000 | nA | D060, VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 125°C | 276 |
| Input Leakage Current, MCLR | IIL | -200 | 50 | 200 | nA | D061, VSS ≤ VPIN ≤ VDD, Pin at high-impedance, 85°C | 276 |
| Weak Pull-up Current | IPUR | 25 | 100 | 200 | µA | D070, VDD = 3.3V, VPIN = VSS | 276 |
| Output Low Voltage, I/O Ports | VOL | 0.6 | V | IOL = 8 mA, VDD = 5V; IOL = 6 mA, VDD = 3.3V; IOL = 1.8 mA, VDD = 1.8V | 276 | ||
| Capacitive Loading on Output Pins, all I/O pins | CIO | 50 | pF | 276 | |||
| Voltage on MCLR/VPP pin | VIHH | 8 | 9 | V | (Note 2) | 277 | |
| Supply Current during Programming | IDDP | 10 | mA | 277 | |||
| Self-timed Write Cycle Time | TIW | 2 | 2.5 | ms | 277 | ||
| Characteristic Retention | TRETD | 40 | Year | Provided no other specifications are violated | 277 | ||
| Thermal Resistance Junction to Ambient | θJA | 95.3 | °C/W | 14-pin SOIC package | 278 | ||
| Thermal Resistance Junction to Case | θJC | 31 | °C/W | 14-pin SOIC package | 278 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 278 | |||
| Ambient temperature under bias | -40 | 125 | °C | 267 | |||
| Storage temperature | -65 | 150 | °C | 267 | |||
| Voltage on VDD pin with respect to VSS | VDD | -0.3 | 4 | V | PIC16LF1503 | 267 | |
| Voltage on MCLR pin with respect to VSS | -0.3 | 9 | V | 267 | |||
| Maximum current on VSS pin | 85 | mA | -40°C ≤ TA ≤ +85°C | 267 | |||
| Maximum current on VDD pin | 85 | mA | -40°C ≤ TA ≤ +85°C | 267 | |||
| Maximum current on any I/O pin | 25 | mA | 267 | ||||
| Clamp current | IK | 20 | mA | VPIN < 0 or VPIN > VDD | 267 | ||
| Operating Ambient Temperature Range, Industrial | TA | -40 | 85 | °C | Industrial Temperature | 268 | |
| Brown-out Reset Voltage | VBOR | 2.55 | 2.7 | 2.85 | V | BORV = 0 | 284 |
| Brown-out Reset Voltage | VBOR | 1.8 | 1.9 | 2.05 | V | BORV = 1 (PIC16LF1503) | 284 |
| Brown-out Reset Hysteresis | VHYST | 0 | 25 | 75 | mV | -40°C ≤ TA ≤ +85°C | 284 |
| Low-Power Brown-Out Reset Voltage | VLPBOR | 1.8 | 2.1 | 2.5 | V | LPBOR = 1 | 284 |
| Low-Power Watchdog Timer Time-out Period | TWDTLP | 10 | 16 | 27 | ms | VDD = 3.3V-5V, 1:16 Prescaler used | 284 |
| Power-up Timer Period | TPWRT | 40 | 65 | 140 | ms | PWRTE = 0 | 284 |
| ADC Integral Error | EIL | 1 | 1.7 | LSb | VREF = 3.0V | 287 | |
| Comparator Input Offset Voltage | VIOFF | -60 | 7.5 | 60 | mV | CxSP = 1, VICM = VDD/2 | 290 |
| Power-on Reset Release Voltage | VPOR | 1.6 | V | 270 | |||
| Power-on Reset Rearm Voltage | VPORR | 0.8 | V | 270 | |||
| Internal LFINTOSC Frequency | LFOSC | 31 | kHz | (Note 3) | 281 | ||
| Internal Calibrated HFINTOSC Frequency | HFOSC | 16 | MHz | VDD = 3.0V, TA = 25°C, ±2% tolerance | 281 |
CAD (KiCad official)
- Symbol:
PIC16LF1503-I - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOP-14 (KiCad packages3D, STEP)
- 3D model files:
pic16lf1503-i-etched.step/pic16lf1503-i-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);pic16lf1503-i.step/pic16lf1503-i.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Microchip Tech datasheet (355 pp, sha256
c066d5d50ddfaf92, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).