component
ADG1411YRUZ-REEL7
Public Made by Adomby adom
Analog Devices Analog Switches, Multiplexers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownADG1411YRUZ-REEL7
Analog Devices · Analog Switches, Multiplexers · TSSOP-16
ADG1411YRUZ-REEL7 from Analog Devices, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | input | Logic control input for switch 1; per the truth table, ADG1411 switch 1 is on at logic 0 and ADG1412 at logic 1. |
| 2 | D1 | passive | Drain terminal of switch 1; this pin can be an input or output. |
| 3 | S1 | passive | Source terminal of switch 1; this pin can be an input or output. |
| 4 | VSS | power_in | Most negative power supply potential; VSS to GND is rated +0.3 V to −25 V and VDD to VSS is rated 35 V maximum. |
| 5 | GND | power_in | Ground (0 V) reference for the device. |
| 6 | S4 | passive | Source terminal of switch 4; this pin can be an input or output. |
| 7 | D4 | passive | Drain terminal of switch 4; this pin can be an input or output. |
| 8 | IN4 | input | Logic control input for switch 4; the ADG1413 inverts logic on this switch relative to the ADG1411 control scheme. |
| 9 | IN3 | input | Logic control input for switch 3; the ADG1413 inverts logic on this switch relative to the ADG1411 control scheme. |
| 10 | D3 | passive | Drain terminal of switch 3; this pin can be an input or output. |
| 11 | S3 | passive | Source terminal of switch 3; this pin can be an input or output. |
| 12 | NIC | unconnected | No internal connection. |
| 13 | VDD | power_in | Most positive power supply potential; VDD to GND is rated −0.3 V to +25 V. |
| 14 | S2 | passive | Source terminal of switch 2; this pin can be an input or output. |
| 15 | D2 | passive | Drain terminal of switch 2; this pin can be an input or output. |
| 16 | IN2 | input | Logic control input for switch 2; the ADG1413 inverts logic on this switch relative to the ADG1411 control scheme. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSSOP-16 |
| Category | Interface |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| On Resistance, RON at 25°C | RON | 1.5 | 1.8 | Ω | VS = ±10 V, IS = −10 mA; VDD = +13.5 V, VSS = −13.5 V | 3 | |
| On Resistance, RON at −40°C to +85°C | RON | 2.3 | Ω | −40°C to +85°C; VDD = +13.5 V, VSS = −13.5 V | 3 | ||
| On Resistance, RON at −40°C to +125°C | RON | 2.6 | Ω | −40°C to +125°C; VDD = +13.5 V, VSS = −13.5 V | 3 | ||
| On-Resistance Match Between Channels, ΔRON at 25°C | ΔRON | 0.1 | 0.18 | Ω | VS = ±10 V, IS = −10 mA | 3 | |
| On-Resistance Match Between Channels, ΔRON at −40°C to +85°C | ΔRON | 0.19 | Ω | −40°C to +85°C | 3 | ||
| On-Resistance Match Between Channels, ΔRON at −40°C to +125°C | ΔRON | 0.21 | Ω | −40°C to +125°C | 3 | ||
| On-Resistance Flatness, RFLAT(ON) at 25°C | RFLAT(ON) | 0.3 | 0.36 | Ω | VS = ±10 V, IS = −10 mA | 3 | |
| On-Resistance Flatness, RFLAT(ON) at −40°C to +85°C | RFLAT(ON) | 0.4 | Ω | −40°C to +85°C | 3 | ||
| On-Resistance Flatness, RFLAT(ON) at −40°C to +125°C | RFLAT(ON) | 0.45 | Ω | −40°C to +125°C | 3 | ||
| Source Off Leakage, IS(Off) at 25°C | IS(Off) | -0.55 | 0.03 | 0.55 | nA | VDD = +16.5 V, VSS = −16.5 V; VS = ±10 V, VD = ∓10 V; see Figure 24 | 3 |
| Source Off Leakage, IS(Off) at −40°C to +85°C | IS(Off) | -2 | 2 | nA | −40°C to +85°C; VDD = +16.5 V, VSS = −16.5 V | 3 | |
| Source Off Leakage, IS(Off) at −40°C to +125°C | IS(Off) | -12.5 | 12.5 | nA | −40°C to +125°C; VDD = +16.5 V, VSS = −16.5 V | 3 | |
| Drain Off Leakage, ID(Off) at 25°C | ID(Off) | -0.55 | 0.03 | 0.55 | nA | VDD = +16.5 V, VSS = −16.5 V; VS = ±10 V, VD = ∓10 V; see Figure 24 | 3 |
| Drain Off Leakage, ID(Off) at −40°C to +85°C | ID(Off) | -2 | 2 | nA | −40°C to +85°C; VDD = +16.5 V, VSS = −16.5 V | 3 | |
| Drain Off Leakage, ID(Off) at −40°C to +125°C | ID(Off) | -12.5 | 12.5 | nA | −40°C to +125°C; VDD = +16.5 V, VSS = −16.5 V | 3 | |
| Channel On Leakage, ID, IS(On) at 25°C | ID, IS(On) | -2 | 0.15 | 2 | nA | VDD = +16.5 V, VSS = −16.5 V; VS = VD = ±10 V; see Figure 25 | 3 |
| Channel On Leakage, ID, IS(On) at −40°C to +85°C | ID, IS(On) | -4 | 4 | nA | −40°C to +85°C; VDD = +16.5 V, VSS = −16.5 V | 3 | |
| Channel On Leakage, ID, IS(On) at −40°C to +125°C | ID, IS(On) | -30 | 30 | nA | −40°C to +125°C; VDD = +16.5 V, VSS = −16.5 V | 3 | |
| Input High Voltage, VINH | VINH | 2 | V | 3 | |||
| Input Low Voltage, VINL | VINL | 0.8 | V | 3 | |||
| Input Current, IINL or IINH | IINL, IINH | -0.1 | 0.005 | 0.1 | µA | VIN = VGND or VDD | 3 |
| Turn-On Time, tON at 25°C | tON | 100 | 150 | ns | RL = 300 Ω, CL = 35 pF; VS = 10 V; see Figure 30 | 3 | |
| Turn-On Time, tON at −40°C to +85°C | tON | 170 | ns | −40°C to +85°C; VS = 10 V; see Figure 30 | 3 | ||
| Turn-On Time, tON at −40°C to +125°C | tON | 190 | ns | −40°C to +125°C; VS = 10 V; see Figure 30 | 3 | ||
| Turn-Off Time, tOFF at 25°C | tOFF | 90 | 120 | ns | RL = 300 Ω, CL = 35 pF; VS = 10 V; see Figure 30 | 3 | |
| Turn-Off Time, tOFF at −40°C to +85°C | tOFF | 140 | ns | −40°C to +85°C; VS = 10 V; see Figure 30 | 3 | ||
| Turn-Off Time, tOFF at −40°C to +125°C | tOFF | 160 | ns | −40°C to +125°C; VS = 10 V; see Figure 30 | 3 | ||
| IDD supply current, digital inputs 0 V or VDD | IDD | 0.001 | 1 | µA | Digital inputs = 0 V or VDD; VDD = +16.5 V, VSS = −16.5 V | 3 | |
| IDD supply current, digital inputs 5 V | IDD | 220 | 380 | µA | Digital inputs = 5 V; VDD = +16.5 V, VSS = −16.5 V | 3 | |
| ISS supply current, digital inputs 0 V or VDD | ISS | 0.001 | 1 | µA | Digital inputs = 0 V or VDD; VDD = +16.5 V, VSS = −16.5 V | 3 | |
| Dual supply range, VDD/VSS (magnitude) | VDD/VSS | 4.5 | 16.5 | V | GND = 0 V | 3 | |
| VDD to VSS | 35 | V | 6 | ||||
| VDD to GND | -0.3 | 25 | V | 6 | |||
| VSS to GND | -25 | 0.3 | V | 6 | |||
| Analog Inputs current | 30 | mA | whichever occurs first (with voltage limit VSS − 0.3 V to VDD + 0.3 V) | 6 | |||
| Digital Inputs current | 30 | mA | whichever occurs first (with voltage limit GND − 0.3 V to VDD + 0.3 V) | 6 | |||
| Peak Current, Sx or Dx Pins | 500 | mA | pulsed at 1 ms, 10% duty cycle maximum | 6 | |||
| Continuous Current per Channel at 25°C, 16-Lead TSSOP | 190 | mA | 6 | ||||
| Continuous Current per Channel at 125°C, 16-Lead TSSOP | 90 | mA | 6 | ||||
| Operating Temperature Range, Automotive (Y Version) | -40 | 125 | °C | Automotive (Y Version) | 6 | ||
| Storage Temperature Range | -65 | 150 | °C | 6 | |||
| Junction Temperature | 150 | °C | 6 | ||||
| Thermal Impedance θJA, 16-Lead TSSOP (4-Layer Board) | θJA | 112 | °C/W | 4-layer board | 6 | ||
| Reflow Soldering Peak Temperature, Pb Free (printed 260 (+0/−5)) | 260 | °C | 6 |
CAD (KiCad official)
- Symbol:
ADG1411YRUZ-REEL7 - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
adg1411yruz-reel7-etched.step/adg1411yruz-reel7-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);adg1411yruz-reel7.step/adg1411yruz-reel7.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (16 pp, sha256
e1538f3538878d69, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).