ISL78206AVEZ-T7A from RENESAS, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	PGND	power_in	Ground connection for the power flow, including the gate driver.
2	BOOT	power_out	Provides bias voltage to the high-side MOSFET driver through an integrated bootstrap circuit; a 1µF ceramic capacitor is recommended between BOOT and PHASE.
3	VIN	power_in	Input rail connection to the drain of the integrated high-side MOSFET and to the source of the internal linear regulator; the operating input voltage must be under 40V.
4	VIN	power_in	Input rail connection to the drain of the integrated high-side MOSFET and to the source of the internal linear regulator; the operating input voltage must be under 40V.
5	SGND	power_in	Return path for the control and monitor portions of the IC.
6	VCC	power_out	Output of the internal linear regulator that supplies bias to the IC including the driver; a minimum 4.7µF ceramic decoupling capacitor to ground is recommended.
7	NC	unconnected	No connection pin; connect to SGND at a quiet ground copper plane.
8	EN	input	Enables the controller when pulled HIGH or left floating and disables it when pulled LOW; range 0V to 5.5V.
9	FS	input	Tying to VCC or GND, or leaving open, forces 500kHz switching; a resistor from this pin to GND programs the oscillator frequency.
10	SS	passive	A capacitor to ground, with an internal 5µA current source, sets the soft-start interval; the pin can also track an external ramp.
11	FB	input	Inverting input of the voltage feedback error amplifier, referenced to 0.8V, with the output set by a resistor divider from VOUT; also monitored for overvoltage.
12	COMP	output	Output of the voltage feedback error amplifier, with the loop compensation RC network connected across COMP and FB.
13	ILIMIT	passive	Connecting to VCC, to GND, or leaving open sets the current limit to a default of 3.6A; a resistor from this pin to GND programs the threshold.
14	DGND	power_in	Digital ground pin; connect to SGND at a quiet ground copper plane.
15	PGOOD	output	Open-drain output that requires a pull-up resistor to VCC; it is pulled low on output overvoltage/undervoltage or when EN is low, and rises after a fixed 128 cycle delay.
16	PHASE	output	Phase node connected to the output inductor and to the source of the high-side N-channel MOSFET.
17	PHASE	output	Phase node connected to the output inductor and to the source of the high-side N-channel MOSFET.
18	NC	unconnected	No connection pin; connect to SGND at a quiet ground copper plane.
19	SYNC	bidirectional	Synchronizes multiple controllers (180 degree phase shift is automatically generated between master and slave), or locks to an external square pulse 10% above local frequency with pulse width above 150ns; leave floating if unused.
20	LGATE	output	Drives the lower-side MOSFET in synchronous buck mode, requiring a 5.1k or smaller resistor to ground; in non-synchronous buck it connects to VCC through a resistor below 5k before VCC start-up.
21	PAD	unconnected	Bottom thermal pad, not electrically connected to any IC potential; it must be connected to a PCB ground copper plane with area as large as possible to reduce thermal impedance.

Key specifications

Parameter	Value
Manufacturer	RENESAS
Package	HTSSOP-20-EP
Category	Power Management ICs
Pins	21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
VIN Voltage Range	VIN	3.05		40	V		6
VIN connected to VCC		3.05		5.5	V		6
Operating Supply Current	IQ			1.3	mA	IC operating, not including driving current, VIN = 12V	6
Shut Down Supply Current	IIN_SD	2.8		4.5	µA	EN connected to GND, VIN = 12V	6
MAIN LDO VCC Voltage	VCC	4.2	4.5	4.8	V	VIN > 5V	6
MAIN LDO Dropout Voltage	VDROPOUT_MAIN	0.3		0.52	V	VIN = 4.2V, IVCC = 35mA	6
MAIN LDO Dropout Voltage	VDROPOUT_MAIN	0.25		0.42	V	VIN = 3V, IVCC = 25mA	6
VCC Current Limit of MAIN LDO				60	mA		6
Rising VCC POR Threshold	VPORH_RISE	2.82	2.9	3.05	V		6
Falling VCC POR Threshold	VPORL_FALL	2.6		2.8	V		6
Required Enable On Voltage	VENH	1.7			V		6
Required Enable Off Voltage	VENL			1	V		6
PWM Frequency	fOSC	160	200	240	kHz	RT = 665kΩ	7
PWM Frequency	fOSC	1870	2200	2530	kHz	RT = 51.1kΩ	7
PWM Frequency	fOSC	450	500	550	kHz	FS pin connected to VCC or floating or GND	7
MIN ON Time	tMIN_ON	130		225	ns		7
MIN OFF Time	tMIN_OFF	210		330	ns		7
Input High Threshold	VIH	2			V	SYNC input	7
Input Low Threshold	VIL			0.5	V	SYNC input	7
Input Minimum Pulse Width		25			ns	SYNC input	7
Input Minimum Frequency Divided by Free Running Frequency		1.1					7
Input Maximum Frequency Divided by Free Running Frequency				1.6			7
System Accuracy	VREF	-1		1	%		7
Soft-start Current	ISS	3	5	7	µA		7
Maximum Output Voltage				3.6	V	Error amplifier	7
Minimum Output Voltage		0.5			V	Error amplifier	7
Upper MOSFET rDS(ON)	rDS(ON)_UP	127		140	mΩ	Limits apply for +25°C; wire bonds included (Note 6)	7
LGATE Source Resistance				3.5	Ω	100mA source current	7
LGATE Sink Resistance				2.8	Ω	100mA sink current	7
Overvoltage Rising Trip Point	VFB/VREF	104	110	116	%	Percentage of reference point	7
Undervoltage Falling Trip Point	VFB/VREF	84	90	96	%	Percentage of reference point	8
PGOOD Leakage Current				10	nA	PGOOD HIGH, VPGOOD = 4.5V	8
PGOOD Low Voltage	VPGOOD			0.1	V	PGOOD LOW, IPGOOD = 0.2mA	8
Default Cycle-by-cycle Current Limit Threshold	IOC_1	3	3.6	4.2	A	ILIMIT = GND or VCC or floating	8
VIN, PHASE voltage	VIN, PHASE	-0.3		44	V	Referenced to GND	6
VCC voltage	VCC	-0.3		6	V	Referenced to GND	6
Absolute Boot Voltage	VBOOT			50	V		6
Upper Driver Supply Voltage	VBOOT - VPHASE			6	V		6
ESD Human Body Model	HBM			2000	V	JESD22-A114F	6
ESD Machine Model	MM			250	V	JESD22-A115C	6
ESD Charged Device Model	CDM			1000	V	AEC-Q100-11	6
Latch-up Rating				100	mA	JESD78B; Class II, Level A	6
Maximum Junction Temperature	TJ			150	°C	Plastic package	6
Maximum Storage Temperature Range	TSTG	-65		150	°C		6
Supply Voltage on VIN	VIN	3		40	V		6
Ambient Temperature Range (Automotive)	TA	-40		105	°C		6
Junction Temperature Range	TJ	-40		125	°C		6
EN pin range	EN	0		5.5	V	Pin description (EN pin)	2
Thermal Resistance Junction-to-Ambient, 20 Ld HTSSOP	θJA		32		°C/W	Free air, high-effective-conductivity test board (Notes 4, 5)	6
Thermal Resistance Junction-to-Case, 20 Ld HTSSOP	θJC		3.5		°C/W	Case temperature at center of exposed metal pad (Note 5)	6

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts	copper		to a default of 3.6A; the current limit threshold can be programmed with a resistor from this pin to GND. DGND 14 Digital ground pin. Connect to SGND at quiet ground copper plane.	2

CAD (KiCad official)

Symbol: ISL78206AVEZ-T7A
Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
3D model files: isl78206avez-t7a-etched.step / isl78206avez-t7a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); isl78206avez-t7a.step / isl78206avez-t7a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: RENESAS datasheet (19 pp, sha256 bedec7952e41154e, retrieved 2026-10-30, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

ISL78206AVEZ-T7A

Verified ISL78206AVEZ-T7A

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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