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Contents

Pinout
Key specifications
Electrical characteristics
CAD (KiCad official)
Provenance

README

markdown

BQ24232HARGTR

Texas Instruments · Pre-ordered Chips · VQFN-16-EP(3x3)

BQ24232HARGTR from Texas Instruments, in a VQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	TS	input	External NTC thermistor input that monitors a 10-kΩ NTC in the battery pack, and must be tied to VSS through a 10-kΩ fixed resistor if the TS function is unused.
2	BAT	bidirectional	Charger power stage output and battery voltage sense input that connects to the positive battery terminal and must be bypassed to VSS with a 4.7-μF to 47-μF ceramic capacitor.
3	BAT	bidirectional	Charger power stage output and battery voltage sense input that connects to the positive battery terminal and must be bypassed to VSS with a 4.7-μF to 47-μF ceramic capacitor.
4	CE	input	Active-low charge enable input, internally pulled down with about 285 kΩ, that must not be left unconnected.
5	EN2	input	Input current limit configuration input, internally pulled down with about 285 kΩ, that must not be left unconnected and together with EN1 sets the maximum input current and USB compliance mode.
6	EN1	input	Input current limit configuration input, internally pulled down with about 285 kΩ, that must not be left unconnected and together with EN2 sets the maximum input current and USB compliance mode.
7	PGOOD	output	Open-drain power good output that pulls to VSS when a valid input source is detected and is high-impedance otherwise, with a 1-kΩ to 100-kΩ pull-up resistor recommended.
8	VSS	power_in	Ground pin that must be connected to the thermal pad and the circuit ground rail at all times.
9	CHG	output	Open-drain charging status output that pulls to VSS while the battery is charging and is high-impedance when charging is complete or the charger is disabled.
10	OUT	output	System supply output that provides a regulated voltage when the input is within operating range and connects to VBAT when the input is out of range, and must be bypassed to VSS with a 4.7-μF to 47-μF ceramic capacitor.
11	OUT	output	System supply output that provides a regulated voltage when the input is within operating range and connects to VBAT when the input is out of range, and must be bypassed to VSS with a 4.7-μF to 47-μF ceramic capacitor.
12	ILIM	input	Adjustable current limit programming input that requires a 3.06-kΩ to 7.8-kΩ resistor to VSS in the EN2 = 1, EN1 = 0 mode, and disables all charging if left unconnected in that mode.
13	IN	power_in	Input power connection for the AC adapter or USB port with an operating range of 4.35 V to 6.6 V, which can withstand up to 26 V without damage but suspends operation, and requires a 1-μF to 10-μF bypass capacitor to VSS.
14	TMR	input	Timer programming input that disables the safety timers when tied to VSS, uses an 18-kΩ to 72-kΩ resistor to VSS to set a custom length, and selects the 5-hour fast-charge and 30-minute precharge defaults when left unconnected.
15	ITERM	input	Termination current programming input that uses a 0-Ω to 15-kΩ resistor to VSS and defaults to a 10% threshold when left unconnected.
16	ISET	bidirectional	Fast-charge current programming input that uses a 1.8-kΩ to 36-kΩ resistor to VSS, disables charging when left unconnected, and reflects the actual charge current as a voltage while charging.
17	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-16-EP(3x3)
Category	Interface ICs
Pins	17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
IN input voltage (with respect to VSS)	VI	-0.3		28	V		4
OUT voltage (with respect to VSS)		-0.3		7	V		4
BAT voltage (with respect to VSS)		-0.3		5	V		4
EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR, TD, ITERM (with respect to VSS)		-0.3		7	V		4
Input current IN	II			600	mA		4
Output current (continuous) OUT	IO			1700	mA		4
Output current (continuous) BAT discharge mode	IO			1700	mA		4
Output sink current CHG, PGOOD				15	mA		4
Junction temperature	TJ	-40		150	°C		4
Storage temperature	Tstg	-65		150	°C		4
Electrostatic discharge, human body model, all pins	V(ESD)	-1000		1000	V	per ANSI/ESDA/JEDEC JS-001	4
Electrostatic discharge, charged device model, all pins	V(ESD)	-250		250	V	per JEDEC JESD22-C101	4
IN voltage	VI	4.35		26	V	junction temperature -5 C to 125 C	4
IN operating voltage	VI	4.35		10.2	V	junction temperature -5 C to 125 C	4
Input current, IN pin	IIN			500	mA		4
Current, OUT pin	IOUT			1500	mA		4
Current, BAT pin (discharging)	IBAT			1500	mA		4
Current, BAT pin (charging)	ICHG			500	mA		4
Maximum input current programming resistor	RILIM	3.1		7.8	kΩ		4
Fast-charge current programming resistor	RISET	1.8		36	kΩ		4
Timer programming resistor	RTMR	18		72	kΩ		4
Termination programming resistor	RITERM	0		15	kΩ		4
Junction temperature (recommended)	TJ	-5		125	°C		4
Undervoltage lockout	UVLO	3.2	3.3	3.4	V	VIN: 0 V to 4 V	5
Input power detection threshold	VIN(DT)	55	95	152	mV	VBAT = 3.6 V, VIN: 3.5 V to 4 V	5
Input overvoltage protection threshold ('232)	VOVP	10.2	10.5	10.8	V	VIN: 5 V to 11 V	5
OUT pin voltage regulation	VO(REG)	4.35	4.5	4.6	V	VIN > VOUT + VDO(IN-OUT)	6
Maximum input current	IINmax	90	95	100	mA	EN1 = LO, EN2 = LO	6
Maximum input current	IINmax	450	475	500	mA	EN1 = HI, EN2 = LO	6
Maximum input current factor	KILIM	1380	1571	1700	AΩ	ILIM = 200 mA to 500 mA	6
Programmable input current limit range	IINmax	200		500	mA	EN2 = HI, EN1 = LO, RILIM = 3.06 kΩ to 7.8 kΩ	6
Input voltage threshold when input current is reduced	VIN-DPM	4.3	4.35	4.63	V	EN2 = LO, EN1 = X	6
Output short-circuit detection threshold, power-on	VO(SC1)	0.8	0.9	1	V	VIN > UVLO and VIN > VBAT+VIN(DT)	6
Output short-circuit detection threshold, supplement mode	VO(SC2)	200	242	300	mV	VIN > UVLO and VIN > VBAT+VIN(DT); VBAT - VOUT > VO(SC2) indicates short circuit	6
Source current for BAT pin short-circuit detection	IBAT(SC)	4	8.15	11	mA	VBAT = 1.5 V	7
BAT pin short-circuit detection threshold	VBAT(SC)	1.6	1.8	2	V	VBAT rising	7
Battery charge voltage	VBAT(REG)	4.25	4.31	4.35	V		7
Precharge to fast-charge transition threshold	VLOWV	2.9	3	3.1	V	VIN > UVLO and VIN > VBAT + VIN(DT)	7
Battery fast-charge current range	ICHG	25		500	mA	VBAT(REG) > VBAT > VLOWV, VIN = 5 V, CE = LO, EN1 = LO, EN2 = HI	7
KISET fast-charge current factor	KISET	797	870	975	AΩ	25 mA ≥ ICHG ≥ 500 mA	7
Precharge current factor	KIPRECHG	70	88	106	AΩ	2.5 mA ≥ IPRECHG ≥ 30 mA	7
Termination comparator threshold for termination detection	ITERM	0.09	0.1	0.11	×ICHG	CE = LO, (EN1,EN2) ≠ (LO,LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop and thermal loop not active	7
Termination comparator threshold for termination detection	ITERM	0.027	0.033	0.04	×ICHG	CE = LO, (EN1,EN2) = (LO,LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop and thermal loop not active	7
K factor for termination detection threshold (externally set)	KITERM	0.024	0.03	0.036	A	CE = LO, (EN1,EN2) ≠ (LO,LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop and thermal loop not active	7
K factor for termination detection threshold (externally set)	KITERM	0.009	0.01	0.011	A	CE = LO, (EN1,EN2) = (LO,LO), VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPM loop and thermal loop not active	7
Sink current for battery detection	IBAT(DET)	5	7.5	10	mA	VBAT=2.5 V	7
NTC bias current	INTC	72	75	79	μA	VIN > UVLO and VIN > VBAT+VIN(DT)	7
High-temperature trip point	VHOT	270	300	330	mV	Battery charging, VTS falling	7
Low-temperature trip point	VCOLD	2000	2100	2200	mV	Battery charging, VTS rising	7
Precharge safety timer value	tPRECHG	1440	1800	2160	s	TMR = floating	8
Charge safety timer value	tMAXCHG	14400	18000	21600	s	TMR = floating	8
Timer factor	KTMR	36	48	60	s/kΩ		8
Junction-to-ambient thermal resistance	RθJA		44.5		°C/W		5
Junction-to-case (top) thermal resistance	RθJC(top)		54.2		°C/W		5
Junction-to-board thermal resistance	RθJB		17.2		°C/W		5
Junction-to-case (bottom) thermal resistance	RθJC(bot)		3.8		°C/W		5

CAD (KiCad official)

Symbol: BQ24232HARGTR
Footprint: Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm
3D model: VQFN-16-EP(3x3) (KiCad packages3D, STEP)
3D model files: bq24232hargtr-etched.step / bq24232hargtr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); bq24232hargtr.step / bq24232hargtr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (40 pp, sha256 fd8e61c0308962e4, retrieved 2026-10-28, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF