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STM32F469BIT6

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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-208(28x28). Pinout checked against ST's open pin data, KiCad symbol/footprint/3D.

componentembedded processors & controllersstm32f469bit6factory-2.0.0extractor-text
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README

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STM32F469BIT6

STMicroelectronics · Microcontrollers (MCU/MPU/SOC) · LQFP-208(28x28)

STM32F469BIT6 from STMicroelectronics, in a LQFP-208(28x28). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model, then checked against ST open pin data); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 PE2 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACECLK, SPI4_SCK, SAI1_MCLK_A, QUADSPI_BK1_IO2, ETH_MII_TXD3 and FMC_A23.
2 PE3 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED0, SAI1_SD_B and FMC_A19.
3 PE4 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED1, SPI4_NSS, SAI1_FS_A, FMC_A20, DCMI_D4 and LCD_B0.
4 PE5 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED2, TIM9_CH1, SPI4_MISO, SAI1_SCK_A and FMC_A21.
5 PE6 bidirectional 5 V-tolerant I/O (FT); alternate functions include TRACED3, TIM9_CH2, SPI4_MOSI, SAI1_SD_A and FMC_A22.
6 VBAT power_in Backup-domain supply for the RTC, backup registers and optional backup SRAM, specified at 1.8 V to 3.6 V.
7 PI8 bidirectional Supplied through the power switch, which sinks only 3 mA, so as a GPIO it must not exceed 2 MHz with a 30 pF load and must not be used as a current source; additional functions RTC_TAMP1/RTC_TAMP2/RTC_TS.
8 PC13 bidirectional Supplied through the power switch (3 mA sink limit), so as a GPIO it must not exceed 2 MHz with a 30 pF load and must not drive LEDs; additional functions RTC_TAMP1/RTC_TS/RTC_OUT.
9 PC14 bidirectional Supplied through the power switch (3 mA sink limit), so as a GPIO it must not exceed 2 MHz with a 30 pF load and must not be used as a current source; also OSC32_IN for the 32 kHz oscillator.
10 PC15 bidirectional Supplied through the power switch (3 mA sink limit), so as a GPIO it must not exceed 2 MHz with a 30 pF load and must not be used as a current source; also OSC32_OUT for the 32 kHz oscillator.
11 PI9 bidirectional 5 V-tolerant I/O (FT); alternate functions CAN1_RX, FMC_D30 and LCD_VSYNC.
12 PI10 bidirectional 5 V-tolerant I/O (FT); alternate functions ETH_MII_RX_ER, FMC_D31 and LCD_HSYNC.
13 PI11 bidirectional 5 V-tolerant I/O (FT); alternate functions LCD_G6 and OTG_HS_ULPI_DIR.
14 VSS power_in Ground reference pin for the digital core and I/Os.
15 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
16 PF0 bidirectional 5 V-tolerant I/O (FT); alternate functions I2C2_SDA and FMC_A0.
17 PF1 bidirectional 5 V-tolerant I/O (FT); alternate functions I2C2_SCL and FMC_A1.
18 PF2 bidirectional 5 V-tolerant I/O (FT); alternate functions I2C2_SMBA and FMC_A2.
19 PI12 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_HSYNC.
20 PI13 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_VSYNC.
21 PI14 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_CLK.
22 PF3 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate function FMC_A3; analog input ADC3_IN9.
23 PF4 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate function FMC_A4; analog input ADC3_IN14.
24 PF5 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate function FMC_A5; analog input ADC3_IN15.
25 VSS power_in Ground reference pin for the digital core and I/Os.
26 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
27 PF6 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TIM10_CH1, SPI5_NSS, SAI1_SD_B, UART7_Rx and QUADSPI_BK1_IO3; analog input ADC3_IN4.
28 PF7 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TIM11_CH1, SPI5_SCK, SAI1_MCLK_B, UART7_Tx and QUADSPI_BK1_IO2; analog input ADC3_IN5.
29 PF8 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions SPI5_MISO, SAI1_SCK_B, TIM13_CH1 and QUADSPI_BK1_IO0; analog input ADC3_IN6.
30 PF9 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions SPI5_MOSI, SAI1_FS_B, TIM14_CH1 and QUADSPI_BK1_IO1; analog input ADC3_IN7.
31 PF10 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions QUADSPI_CLK, DCMI_D11 and LCD_DE; analog input ADC3_IN8.
32 PH0 bidirectional I/O (FT, 5 V-tolerant except in oscillator mode) that serves as OSC_IN, the external crystal oscillator input.
33 PH1 bidirectional I/O (FT, 5 V-tolerant except in oscillator mode) that serves as OSC_OUT, the external crystal oscillator output.
34 NRST bidirectional Bidirectional reset pin with a weak pull-up resistor.
35 PC0 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions OTG_HS_ULPI_STP, FMC_SDNWE and LCD_R5; analog input ADC123_IN10.
36 PC1 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TRACED0, SPI2_MOSI/I2S2_SD, SAI1_SD_A and ETH_MDC; analog input ADC123_IN11.
37 PC2 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions SPI2_MISO, I2S2ext_SD, OTG_HS_ULPI_DIR, ETH_MII_TXD2 and FMC_SDNE0; analog input ADC123_IN12.
38 PC3 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions SPI2_MOSI/I2S2_SD, OTG_HS_ULPI_NXT, ETH_MII_TX_CLK and FMC_SDCKE0; analog input ADC123_IN13.
39 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
40 VSSA power_in Analog ground pin for the ADC, DAC and other analog blocks.
41 VREF+ power_in Positive reference voltage pin for the 12-bit ADCs and DACs.
42 VDDA power_in Analog supply pin for the ADC, DAC and other analog blocks.
43 PA0 bidirectional 5 V-tolerant I/O (FT) with WKUP wake-up function; alternate functions TIM2_CH1/TIM2_ETR, TIM5_CH1, TIM8_ETR, USART2_CTS, UART4_TX and ETH_MII_CRS; analog input ADC123_IN0.
44 PA1 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TIM2_CH2, TIM5_CH2, USART2_RTS, UART4_RX and QUADSPI_BK1_IO3; analog input ADC123_IN1.
45 PA2 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TIM2_CH3, TIM5_CH3, TIM9_CH1, USART2_TX and ETH_MDIO; analog input ADC123_IN2.
46 PH2 bidirectional 5 V-tolerant I/O (FT); alternate functions QUADSPI_BK2_IO0, ETH_MII_CRS, FMC_SDCKE0 and LCD_R0.
47 PH3 bidirectional 5 V-tolerant I/O (FT); alternate functions QUADSPI_BK2_IO1, ETH_MII_COL, FMC_SDNE0 and LCD_R1.
48 PH4 bidirectional 5 V-tolerant I/O (FT); alternate functions I2C2_SCL, LCD_G5, OTG_HS_ULPI_NXT and LCD_G4.
49 PH5 bidirectional 5 V-tolerant I/O (FT); alternate functions I2C2_SDA, SPI5_NSS and FMC_SDNWE.
50 PA3 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TIM2_CH4, TIM5_CH4, TIM9_CH2, USART2_RX, OTG_HS_ULPI_D0 and ETH_MII_COL; analog input ADC123_IN3.
51 VSS power_in Ground reference pin for the digital core and I/Os.
52 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
53 PA4 bidirectional 3.3 V-tolerant TTa I/O connected directly to analog parts; alternate functions SPI1_NSS, SPI3_NSS/I2S3_WS, USART2_CK, OTG_HS_SOF and DCMI_HSYNC; analog outputs ADC12_IN4 and DAC_OUT1.
54 PA5 bidirectional 3.3 V-tolerant TTa I/O connected directly to analog parts; alternate functions TIM2_CH1/TIM2_ETR, TIM8_CH1N, SPI1_SCK, OTG_HS_ULPI_CK and LCD_R4; analog inputs ADC12_IN5 and DAC_OUT2.
55 PA6 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TIM1_BKIN, TIM3_CH1, TIM8_BKIN, SPI1_MISO, TIM13_CH1, DCMI_PIXCLK and LCD_G2; analog input ADC12_IN6.
56 PA7 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TIM1_CH1N, TIM3_CH2, TIM8_CH1N, SPI1_MOSI, TIM14_CH1, QUADSPI_CLK and FMC_SDNWE; analog input ADC12_IN7.
57 PC4 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions ETH_MII_RXD0/ETH_RMII_RXD0 and FMC_SDNE0; analog input ADC12_IN14.
58 PC5 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions ETH_MII_RXD1/ETH_RMII_RXD1 and FMC_SDCKE0; analog input ADC12_IN15.
59 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
60 VSS power_in Ground reference pin for the digital core and I/Os.
61 PB0 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TIM1_CH2N, TIM3_CH3, TIM8_CH2N, LCD_R3, OTG_HS_ULPI_D1 and ETH_MII_RXD2; analog input ADC12_IN8.
62 PB1 bidirectional 5 V-tolerant I/O (FT, except in analog mode); alternate functions TIM1_CH3N, TIM3_CH4, TIM8_CH3N, LCD_R6, OTG_HS_ULPI_D2 and ETH_MII_RXD3; analog input ADC12_IN9.
63 PB2 bidirectional 5 V-tolerant I/O (FT) that is also the BOOT1 pin (PB2-BOOT1) and has EVENTOUT as its alternate function.
64 PI15 bidirectional 5 V-tolerant I/O (FT); alternate functions LCD_G2 and LCD_R0.
65 PJ0 bidirectional 5 V-tolerant I/O (FT); alternate functions LCD_R7 and LCD_R1.
66 PJ1 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_R2.
67 PJ2 bidirectional 5 V-tolerant I/O (FT); alternate functions DSIHOST_TE and LCD_R3.
68 PJ3 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_R4.
69 PJ4 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_R5.
70 PF11 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI5_MOSI, FMC_SDNRAS and DCMI_D12.
71 PF12 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A6.
72 VSS power_in Ground reference pin for the digital core and I/Os.
73 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
74 PF13 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A7.
75 PF14 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A8.
76 PF15 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A9.
77 PG0 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A10.
78 PG1 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A11.
79 PE7 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_ETR, UART7_Rx, QUADSPI_BK2_IO0 and FMC_D4.
80 PE8 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH1N, UART7_Tx, QUADSPI_BK2_IO1 and FMC_D5.
81 PE9 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH1, QUADSPI_BK2_IO2 and FMC_D6.
82 VSS power_in Ground reference pin for the digital core and I/Os.
83 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
84 PE10 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH2N, QUADSPI_BK2_IO3 and FMC_D7.
85 PE11 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH2, SPI4_NSS, FMC_D8 and LCD_G3.
86 PE12 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH3N, SPI4_SCK, FMC_D9 and LCD_B4.
87 PE13 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH3, SPI4_MISO, FMC_D10 and LCD_DE.
88 PE14 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH4, SPI4_MOSI, FMC_D11 and LCD_CLK.
89 PE15 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_BKIN, FMC_D12 and LCD_R7.
90 PB10 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM2_CH3, I2C2_SCL, SPI2_SCK/I2S2_CK, USART3_TX, QUADSPI_BK1_NCS, OTG_HS_ULPI_D3 and LCD_G4.
91 PB11 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM2_CH4, I2C2_SDA, USART3_RX, OTG_HS_ULPI_D4, ETH_MII_TX_EN/ETH_RMII_TX_EN, DSIHOST_TE and LCD_G5.
92 VCAP1 power_out Output of the internal voltage regulator that must be connected to an external capacitor (see section 5.3.2 VCAP1/VCAP2 external capacitor).
93 VSS power_in Ground reference pin for the digital core and I/Os.
94 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
95 PJ5 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_R6.
96 PH6 bidirectional 5 V-tolerant I/O (FT); alternate functions I2C2_SMBA, SPI5_SCK, TIM12_CH1, ETH_MII_RXD2, FMC_SDNE1 and DCMI_D8.
97 PH7 bidirectional 5 V-tolerant I/O (FT); alternate functions I2C3_SCL, SPI5_MISO, ETH_MII_RXD3, FMC_SDCKE1 and DCMI_D9.
98 PH8 bidirectional 5 V-tolerant I/O (FT); alternate functions I2C3_SDA, FMC_D16, DCMI_HSYNC and LCD_R2.
99 PH9 bidirectional 5 V-tolerant I/O (FT); alternate functions I2C3_SMBA, TIM12_CH2, FMC_D17, DCMI_D0 and LCD_R3.
100 PH10 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM5_CH1, FMC_D18, DCMI_D1 and LCD_R4.
101 PH11 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM5_CH2, FMC_D19, DCMI_D2 and LCD_R5.
102 PH12 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM5_CH3, FMC_D20, DCMI_D3 and LCD_R6.
103 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
104 PB12 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_BKIN, I2C2_SMBA, SPI2_NSS/I2S2_WS, USART3_CK, CAN2_RX, OTG_HS_ULPI_D5, ETH_MII_TXD0/ETH_RMII_TXD0 and OTG_HS_ID.
105 PB13 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH1N, SPI2_SCK/I2S2_CK, USART3_CTS, CAN2_TX, OTG_HS_ULPI_D6 and ETH_MII_TXD1/ETH_RMII_TXD1; additional function OTG_HS_VBUS.
106 PB14 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH2N, TIM8_CH2N, SPI2_MISO, I2S2ext_SD, USART3_RTS, TIM12_CH1 and OTG_HS_DM.
107 PB15 bidirectional 5 V-tolerant I/O (FT); alternate functions RTC_REFIN, TIM1_CH3N, TIM8_CH3N, SPI2_MOSI/I2S2_SD, TIM12_CH2 and OTG_HS_DP.
108 PD8 bidirectional 5 V-tolerant I/O (FT); alternate functions USART3_TX and FMC_D13.
109 PD9 bidirectional 5 V-tolerant I/O (FT); alternate functions USART3_RX and FMC_D14.
110 PD10 bidirectional 5 V-tolerant I/O (FT); alternate functions USART3_CK, FMC_D15 and LCD_B3.
111 PD11 bidirectional 5 V-tolerant I/O (FT); alternate functions USART3_CTS, QUADSPI_BK1_IO0 and FMC_A16/FMC_CLE.
112 PD12 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM4_CH1, USART3_RTS, QUADSPI_BK1_IO1 and FMC_A17/FMC_ALE.
113 PD13 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM4_CH2, QUADSPI_BK1_IO3 and FMC_A18.
114 VSS power_in Ground reference pin for the digital core and I/Os.
115 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
116 PD14 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM4_CH3 and FMC_D0.
117 PD15 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM4_CH4 and FMC_D1.
118 VDDDSI power_in Supply pin for the DSI host PHY (VDDDSI).
119 VCAPDSI power_out Connection pin for the external capacitor of the DSI regulator (VCAPDSI).
120 DSIHOST_D0P bidirectional Positive pin of the MIPI DSI data lane 0 differential pair.
121 DSIHOST_D0N bidirectional Negative pin of the MIPI DSI data lane 0 differential pair.
122 VSSDSI power_in Ground pin for the DSI host PHY.
123 DSIHOST_CKP bidirectional Positive pin of the MIPI DSI clock lane differential pair.
124 DSIHOST_CKN bidirectional Negative pin of the MIPI DSI clock lane differential pair.
125 VDD12DSI power_in Supply pin for the DSI D-PHY (VDD12DSI).
126 DSIHOST_D1P bidirectional Positive pin of the MIPI DSI data lane 1 differential pair.
127 DSIHOST_D1N bidirectional Negative pin of the MIPI DSI data lane 1 differential pair.
128 VSSDSI power_in Ground pin for the DSI host PHY.
129 PG2 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A12.
130 PG3 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A13.
131 PG4 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A14/FMC_BA0.
132 PG5 bidirectional 5 V-tolerant I/O (FT); alternate function FMC_A15/FMC_BA1.
133 PG6 bidirectional 5 V-tolerant I/O (FT); alternate functions DCMI_D12 and LCD_R7.
134 PG7 bidirectional 5 V-tolerant I/O (FT); alternate functions SAI1_MCLK_A, USART6_CK, FMC_INT, DCMI_D13 and LCD_CLK.
135 PG8 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI6_NSS, USART6_RTS, ETH_PPS_OUT, FMC_SDCLK and LCD_G7.
136 VSS power_in Ground reference pin for the digital core and I/Os.
137 VDDUSB power_in Dedicated USB supply pin for the OTG_FS and OTG_HS PHYs, specified at 3.0 V to 3.6 V.
138 PC6 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM3_CH1, TIM8_CH1, I2S2_MCK, USART6_TX, SDIO_D6, DCMI_D0 and LCD_HSYNC.
139 PC7 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM3_CH2, TIM8_CH2, I2S3_MCK, USART6_RX, SDIO_D7, DCMI_D1 and LCD_G6.
140 PC8 bidirectional 5 V-tolerant I/O (FT); alternate functions TRACED1, TIM3_CH3, TIM8_CH3, USART6_CK, SDIO_D0 and DCMI_D2.
141 PC9 bidirectional 5 V-tolerant I/O (FT); alternate functions MCO2, TIM3_CH4, TIM8_CH4, I2C3_SDA, I2S_CKIN, QUADSPI_BK1_IO0, SDIO_D1 and DCMI_D3.
142 PA8 bidirectional 5 V-tolerant I/O (FT); alternate functions MCO1, TIM1_CH1, I2C3_SCL, USART1_CK, OTG_FS_SOF and LCD_R6.
143 PA9 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH2, I2C3_SMBA, SPI2_SCK/I2S2_CK, USART1_TX and DCMI_D0; additional function OTG_FS_VBUS.
144 PA10 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH3, USART1_RX, OTG_FS_ID and DCMI_D1.
145 PA11 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_CH4, USART1_CTS, CAN1_RX, OTG_FS_DM and LCD_R4.
146 PA12 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM1_ETR, USART1_RTS, CAN1_TX, OTG_FS_DP and LCD_R5.
147 PA13 bidirectional 5 V-tolerant I/O (FT) that after reset is the JTMS-SWDIO debug pin.
148 VCAP2 power_out Output of the internal voltage regulator that must be connected to an external capacitor (see section 5.3.2 VCAP1/VCAP2 external capacitor).
149 VSS power_in Ground reference pin for the digital core and I/Os.
150 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
151 PH13 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM8_CH1N, CAN1_TX, FMC_D21 and LCD_G2.
152 PH14 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM8_CH2N, FMC_D22, DCMI_D4 and LCD_G3.
153 PH15 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM8_CH3N, FMC_D23, DCMI_D11 and LCD_G4.
154 PI0 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM5_CH4, SPI2_NSS/I2S2_WS, FMC_D24, DCMI_D13 and LCD_G5; cannot be used for I2S2 full-duplex mode.
155 PI1 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI2_SCK/I2S2_CK, FMC_D25, DCMI_D8 and LCD_G6; cannot be used for I2S2 full-duplex mode.
156 PI2 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM8_CH4, SPI2_MISO, I2S2ext_SD, FMC_D26, DCMI_D9 and LCD_G7.
157 PI3 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM8_ETR, SPI2_MOSI/I2S2_SD, FMC_D27 and DCMI_D10.
158 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
159 PA14 bidirectional 5 V-tolerant I/O (FT) that after reset is the JTCK-SWCLK debug pin.
160 PA15 bidirectional 5 V-tolerant I/O (FT) that after reset is the JTDI debug pin; alternate functions TIM2_CH1/TIM2_ETR, SPI1_NSS and SPI3_NSS/I2S3_WS.
161 PC10 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI3_SCK/I2S3_CK, USART3_TX, UART4_TX, QUADSPI_BK1_IO1, SDIO_D2, DCMI_D8 and LCD_R2.
162 PC11 bidirectional 5 V-tolerant I/O (FT); alternate functions I2S3ext_SD, SPI3_MISO, USART3_RX, UART4_RX, QUADSPI_BK2_NCS, SDIO_D3 and DCMI_D4.
163 PC12 bidirectional 5 V-tolerant I/O (FT); alternate functions TRACED3, SPI3_MOSI/I2S3_SD, USART3_CK, UART5_TX, SDIO_CK and DCMI_D9.
164 PD0 bidirectional 5 V-tolerant I/O (FT); alternate functions CAN1_RX and FMC_D2.
165 PD1 bidirectional 5 V-tolerant I/O (FT); alternate functions CAN1_TX and FMC_D3.
166 PD2 bidirectional 5 V-tolerant I/O (FT); alternate functions TRACED2, TIM3_ETR, UART5_RX, SDIO_CMD and DCMI_D11.
167 PD3 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI2_SCK/I2S2_CK, USART2_CTS, FMC_CLK, DCMI_D5 and LCD_G7.
168 PD4 bidirectional 5 V-tolerant I/O (FT); alternate functions USART2_RTS and FMC_NOE.
169 PD5 bidirectional 5 V-tolerant I/O (FT); alternate functions USART2_TX and FMC_NWE.
170 VSS power_in Ground reference pin for the digital core and I/Os.
171 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
172 PD6 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI3_MOSI/I2S3_SD, SAI1_SD_A, USART2_RX, FMC_NWAIT, DCMI_D10 and LCD_B2.
173 PD7 bidirectional 5 V-tolerant I/O (FT); alternate functions USART2_CK and FMC_NE1.
174 PJ12 bidirectional 5 V-tolerant I/O (FT); alternate functions LCD_G3 and LCD_B0.
175 PJ13 bidirectional 5 V-tolerant I/O (FT); alternate functions LCD_G4 and LCD_B1.
176 PJ14 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_B2.
177 PJ15 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_B3.
178 PG9 bidirectional 5 V-tolerant I/O (FT); alternate functions USART6_RX, QUADSPI_BK2_IO2, FMC_NE2/FMC_NCE and DCMI_VSYNC.
179 PG10 bidirectional 5 V-tolerant I/O (FT); alternate functions LCD_G3, FMC_NE3, DCMI_D2 and LCD_B2.
180 PG11 bidirectional 5 V-tolerant I/O (FT); alternate functions ETH_MII_TX_EN/ETH_RMII_TX_EN, DCMI_D3 and LCD_B3.
181 PG12 bidirectional 5 V-tolerant I/O (FT); alternate functions SPI6_MISO, USART6_RTS, LCD_B4, FMC_NE4 and LCD_B1.
182 PG13 bidirectional 5 V-tolerant I/O (FT); alternate functions TRACED0, SPI6_SCK, USART6_CTS, ETH_MII_TXD0/ETH_RMII_TXD0, FMC_A24 and LCD_R0.
183 PG14 bidirectional 5 V-tolerant I/O (FT); alternate functions TRACED1, SPI6_MOSI, USART6_TX, QUADSPI_BK2_IO3, ETH_MII_TXD1/ETH_RMII_TXD1, FMC_A25 and LCD_B0.
184 VSS power_in Ground reference pin for the digital core and I/Os.
185 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
186 PK3 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_B4.
187 PK4 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_B5.
188 PK5 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_B6.
189 PK6 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_B7.
190 PK7 bidirectional 5 V-tolerant I/O (FT); alternate function LCD_DE.
191 PG15 bidirectional 5 V-tolerant I/O (FT); alternate functions USART6_CTS, FMC_SDNCAS and DCMI_D13.
192 PB3 bidirectional 5 V-tolerant I/O (FT); alternate functions JTDO/TRACESWO, TIM2_CH2, SPI1_SCK and SPI3_SCK/I2S3_CK.
193 PB4 bidirectional 5 V-tolerant I/O (FT); alternate functions NJTRST, TIM3_CH1, SPI1_MISO, SPI3_MISO and I2S3ext_SD.
194 PB5 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM3_CH2, I2C1_SMBA, SPI1_MOSI, SPI3_MOSI/I2S3_SD, CAN2_RX, OTG_HS_ULPI_D7, ETH_PPS_OUT, FMC_SDCKE1, DCMI_D10 and LCD_G7.
195 PB6 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM4_CH1, I2C1_SCL, USART1_TX, CAN2_TX, QUADSPI_BK1_NCS, FMC_SDNE1 and DCMI_D5.
196 PB7 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM4_CH2, I2C1_SDA, USART1_RX, FMC_NL and DCMI_VSYNC.
197 BOOT0 input Dedicated BOOT0 input pin that selects the boot mode and also serves as VPP for Flash programming.
198 PB8 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM4_CH3, TIM10_CH1, I2C1_SCL, CAN1_RX, ETH_MII_TXD3, SDIO_D4, DCMI_D6 and LCD_B6.
199 PB9 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM4_CH4, TIM11_CH1, I2C1_SDA, SPI2_NSS/I2S2_WS, CAN1_TX, SDIO_D5, DCMI_D7 and LCD_B7.
200 PE0 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM4_ETR, UART8_Rx, FMC_NBL0 and DCMI_D2.
201 PE1 bidirectional 5 V-tolerant I/O (FT); alternate functions UART8_Tx, FMC_NBL1 and DCMI_D3.
202 VSS power_in Ground reference pin for the digital core and I/Os.
203 PDR_ON input Power-down reset control pin; with internal reset OFF it enables the PDR_ON control described in Figure 9.
204 VDD power_in Digital supply pin for the core and I/Os, within the 1.7 V to 3.6 V application supply range.
205 PI4 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM8_BKIN, FMC_NBL2, DCMI_D5 and LCD_B4.
206 PI5 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM8_CH1, FMC_NBL3, DCMI_VSYNC and LCD_B5.
207 PI6 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM8_CH2, FMC_D28, DCMI_D6 and LCD_B6.
208 PI7 bidirectional 5 V-tolerant I/O (FT); alternate functions TIM8_CH3, FMC_D29, DCMI_D7 and LCD_B7.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package LQFP-208(28x28)
Category Embedded Processors & Controllers
Pins 208

CAD (KiCad official)

  • Symbol: STM32F469BIT6
  • Footprint: Package_QFP:LQFP-208_28x28mm_P0.5mm
  • 3D model: LQFP-208(28x28) (KiCad packages3D, STEP)
  • 3D model files: stm32f469bit6-etched.step / stm32f469bit6-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stm32f469bit6.step / stm32f469bit6.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (220 pp, sha256 a7b7191d1d38665a, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF