component
TPS2140IPWPR
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, HTSSOP-14-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTPS2140IPWPR
Texas Instruments · Power Distribution Switches · HTSSOP-14-EP
TPS2140IPWPR from Texas Instruments, in a HTSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SW_PG | output | Switch power-good output, active-high CMOS logic level that goes low when SW_OUT is undervoltage (below 88% of 3.3 V for TPS2140), and needs no external pullup. |
| 2 | SW_IN | input | Input of the integrated N-channel power switch (65 mΩ maximum on-state resistance, 500 mA continuous); pins 2 and 3 are both SW_IN. |
| 3 | SW_IN | input | Second input pin of the power switch, connected in parallel with pin 2 for SW_IN. |
| 4 | LDO_IN | input | Input of the internal LDO, which has a 0.5 V maximum dropout and is rated for 250 mA continuous current; also one of the two inputs for internal VCC selection. |
| 5 | SW_EN | input | Switch enable input that is active low for TPS2140 (internal pullup), so driving it low enables the switch; pin 5 is active high on TPS2150/51 instead. |
| 6 | LDO_EN | input | Active-high enable for the LDO regulator, with no internal pullup or pulldown. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | LDO_PG | output | LDO power-good output, open-drain and active high, indicating the LDO output status. |
| 9 | ADJ | input | Feedback adjustment input for the LDO that sets the output voltage (adjustable from 0.9 V to 3.3 V per the features list). |
| 10 | LDO_PLDN | input | LDO output pulldown pin; when connected to LDO_OUT it reduces the LDO output fall time without affecting rise time. |
| 11 | LDO_OUT | output | Output of the adjustable 250 mA LDO regulator. |
| 12 | SW_OUT | output | Output of the internal power-distribution switch; pins 12 and 13 are both SW_OUT. |
| 13 | SW_OUT | output | Second output pin of the power-distribution switch, connected in parallel with pin 12. |
| 14 | SW_PLDN | input | Switch output pulldown pin (open-drain discharge path, open when the switch is on and pulled to ground when off); connect to SW_OUT to reduce output fall time. |
| 15 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-14-EP |
| Category | Power Supply Chip |
| Pins | 15 |
CAD (KiCad official)
- Symbol:
TPS2140IPWPR - Footprint:
Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-14-EP (KiCad packages3D, STEP)
- 3D model files:
tps2140ipwpr-etched.step/tps2140ipwpr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2140ipwpr.step/tps2140ipwpr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (33 pp, sha256
8316b929dcdd03f1, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).